60 lines
1.9 KiB
C
60 lines
1.9 KiB
C
/* $NetBSD: rnd.h,v 1.4 2002/03/05 15:40:10 simonb Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _MIPS_RND_H_
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#define _MIPS_RND_H_
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/*
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* Machine-specific support for rnd(4)
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*/
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#include <machine/cpu.h>
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#include <mips/locore.h>
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#ifdef _KERNEL
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#ifdef MIPS3_PLUS
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static __inline int
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cpu_hascounter(void)
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{
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/*
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* MIPS III and MIPS IV CPU's have a cycle counter
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* running at half the internal pipeline rate.
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*/
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return (MIPS_HAS_CLOCK);
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}
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static __inline u_int32_t
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cpu_counter(void)
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{
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return mips3_cp0_count_read();
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}
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#endif
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#endif /* _KERNEL */
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#endif /* !_MIPS_RND_H_ */
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