371 lines
10 KiB
Groff
371 lines
10 KiB
Groff
.\" $NetBSD: acpicpu.4,v 1.34 2011/08/09 07:18:54 jruoho Exp $
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.\"
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.\" Copyright (c) 2010 Jukka Ruohonen <jruohonen@iki.fi>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Neither the name of the author nor the names of any
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.\" contributors may be used to endorse or promote products derived
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.\" from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS
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.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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.\" POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd August 6, 2011
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.Dt ACPICPU 4
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.Os
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.Sh NAME
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.Nm acpicpu
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.Nd ACPI CPU
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.Sh SYNOPSIS
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.Cd "acpicpu* at cpu?"
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.Sh DESCRIPTION
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The
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.Nm
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device driver supports certain processor features that are
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either only available via
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.Tn ACPI
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or that require
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.Tn ACPI
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to function properly.
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Typically the
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.Tn ACPI
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processor functionality is grouped into so-called C-, P-, and T-states.
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.Ss C-states
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The processor power states, or C-states,
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are low-power modes that can be used when the
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.Tn CPU
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is idle.
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The idea is not new: already in the
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.Tn 80486
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processor a specific instruction
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.Pq Tn HLT
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was used for this purpose.
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This was later accompanied by a pair of other instructions
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.Pq Tn MONITOR , MWAIT .
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By default,
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.Nx
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may use either one; see the
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.Ic machdep.idle-mechanism
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.Xr sysctl 8
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variable.
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.Tn ACPI
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provides the latest amendment.
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.Pp
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The following C-states are typically available.
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Additional processor or vendor specific
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states (C4, ..., Cn) are handled internally by
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.Nm .
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.Pp
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.Bl -tag -width C1 -offset indent
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.It Dv C0
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This is the normal state of a processor; the
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.Tn CPU
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is busy executing instructions.
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.It Dv C1
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This is the state that is typically reached via the mentioned
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.Tn x86
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instructions.
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On a typical processor,
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.Dv C1
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turns off the main internal
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.Tn CPU
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clock, leaving
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.Tn APIC
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running at full speed.
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The
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.Tn CPU
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is free to temporarily leave the state to deal with important requests.
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.It Dv C2
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The main difference between
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.Dv C1
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and
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.Dv C2
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lies in the internal hardware entry method of the processor.
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While less power is expected to be consumed than in
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.Dv C1 ,
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the bus interface unit is still running.
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But depending on the processor, the local
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.Tn APIC
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timer may be stopped.
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Like with
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.Dv C1 ,
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entering and exiting the state are expected to be fast operations.
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.It Dv C3
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This is the deepest conventional state.
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Parts of the
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.Tn CPU
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are actively powered down.
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The internal
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.Tn CPU
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clock is stopped.
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The local
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.Tn APIC
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timer is stopped.
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Depending on the processor, additional timers such as
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.Xr x86/tsc 9
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may be stopped.
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Processor caches may be flushed.
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Entry and exit latencies are expected to be high; the
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.Tn CPU
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can no longer
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.Dq quickly
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respond to bus activity or other interruptions.
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.El
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.Pp
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Each state has a latency associated with entry and exit.
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The higher the state, the lower the power consumption, and
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the higher the potential performance costs.
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.Pp
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The
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.Nm
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driver tries to balance the latency
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constraints when choosing the appropriate state.
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One of the checks involves bus master activity;
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if such activity is detected, a lower state is used.
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It is known that particularly
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.Xr usb 4
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may cause high activity even when not in use.
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If maximum power savings are desirable,
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it may be necessary to use a custom kernel without
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.Tn USB
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support.
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And generally: to save power with C-states, one should
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avoid polling, both in userland and in the kernel.
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.Ss P-states
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The processor performance states, or P-states, are used to
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control the clock frequencies and voltages of a
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.Tn CPU .
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Underneath the abstractions of
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.Tn ACPI ,
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P-states are associated with such technologies as
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.Dq SpeedStep
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.Pq Intel ,
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.Dq PowerNow!
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.Pq Tn AMD ,
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and
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.Dq PowerSaver
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.Pq VIA .
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.Pp
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The P0-state is always the highest operating
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frequency supported by the processor.
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The number of additional P-states may vary across processors and vendors.
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Each higher numbered P-state represents lower
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clock frequencies and hence lower power consumption.
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Note that while
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.Nm
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always uses the exact frequencies internally,
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the user-visible values reported by
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.Tn ACPI
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may be rounded or approximated by the vendor.
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.Pp
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Unlike conventional
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.Tn CPU
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frequency management,
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.Tn ACPI
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provides support for Dynamic Voltage and Frequency Scaling
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.Pq Tn DVFS .
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Among other things,
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this means that the firmware may request the implementation to
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dynamically scale the presently supported maximum or minimum clock frequency.
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For example, if
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.Xr acpiacad 4
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is disconnected, the maximum available frequency may be lowered.
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By default,
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the
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.Nx
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implementation may manipulate the frequencies
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according to the notifications from the firmware.
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.Ss T-states
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Processor T-states, or
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.Dq throttling states ,
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can be used to actively modulate the
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time a processor is allowed to execute.
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Outside the
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.Tn ACPI
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nomenclature, throttling and T-states may be known as
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.Dq on-demand clock modulation
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.Pq Tn ODCM .
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.Pp
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The concept of
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.Dq duty cycle
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is relevant to T-states.
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It is generally defined to be a fraction of time that a system is in an
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.Dq active
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state.
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The T0-state has always a duty cycle of 100 \&%,
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and thus, comparable to the C0-state, the processor is fully active.
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Each additional higher-numbered T-state indicates lower duty cycles.
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At most eight T-states may be available, although also T-states use
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.Tn DVFS .
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.Pp
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The duty cycle does not refer to the actual clock signal,
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but to the time period in which the clock signal is allowed
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to drive the processor chip.
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For instance, if a T-state has a duty cycle of 75 \&%, the
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.Tn CPU
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runs at the same clock frequency and uses the same voltage,
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but 25 \&% of the time the
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.Tn CPU
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is forced to idle.
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Because of this, the use of T-states may
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severely affect system performance.
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.Pp
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There are two typical situations for throttling:
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power management and thermal control.
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As a technique to save power,
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T-states are largely an artifact from the past.
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There was a short period in the x86 lineage when P-states
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were not yet available and throttling was considered
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as an option to modulate the processor power consumption.
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The approach was however quickly abandoned.
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In modern x86 systems P-states should be preferred in all circumstances.
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It is also more beneficial to move from the C0-state
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to deeper C-states than it is to actively force down the
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duty cycle of a processor.
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.Pp
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But T-states have retained their use as a last line
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of defense against critical thermal conditions.
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Many x86 processors include a catastrophic shutdown detector.
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When the processor core temperature reaches this factory defined trip-point,
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the processor execution is halted without any software control.
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Before this fatal condition, it is possible to use throttling
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for a short period of time in order to force the temperatures to lower levels.
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The thermal control modulation is typically started only when
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the system is in the highest-power P-state and
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a high temperature situation exists.
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After the temperatures have returned to non-critical levels,
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the modulation ceases.
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.Ss System Control Variables
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The
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.Nm
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driver uses the same
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.Xr sysctl 8
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controls for P-states as the ones provided by
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.Xr est 4
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and
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.Xr powernow 4 .
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Depending on the processor, the second-level node is either
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.Ic machdep.est
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or
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.Ic machdep.powernow .
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Please note that future versions of
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.Nm
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may however remove these system control variables without further notice.
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.Pp
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In addition, the following two variables are available.
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.Bl -tag -width "hw.acpi.cpu.dynamic" -offset indent
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.It Ic hw.acpi.cpu.dynamic
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A boolean that controls whether the states are allowed to change dynamically.
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When enabled, C-, P-, and T-states may all change at runtime, and
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.Nm
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may also take actions based on requests from the firmware.
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.It Ic hw.acpi.cpu.passive
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A boolean that enables or disables automatic processor thermal management via
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.Xr acpitz 4 .
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.El
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.Ss Statistics
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The
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.Nm
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driver uses event counters to track the times
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a processor has entered a given state.
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It is possible to view the statistics by using
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.Xr vmstat 1
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(with the
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.Fl e
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flag).
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.Sh SEE ALSO
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.Xr acpi 4 ,
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.Xr acpitz 4 ,
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.Xr est 4 ,
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.Xr odcm 4 ,
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.Xr powernow 4 ,
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.Xr cpu_idle 9
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.Rs
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.%A Etienne Le Sueur
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.%A Gernot Heiser
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.%T Dynamic Voltage and Frequency Scaling: The Laws of Diminishing Returns
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.%O Proceedings of the 2010 Workshop on \
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Power Aware Computing and Systems (HotPower'10)
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.%D October, 2010
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.%U http://www.ertos.nicta.com.au/publications/papers/LeSueur_Heiser_10.pdf
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.Re
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.Rs
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.%A David C. Snowdon
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.%T Operating System Directed Power Management
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.%O PhD Thesis
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.%I School of Computer Science and Engineering, University of New South Wales
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.%D March, 2010
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.%U http://ertos.nicta.com.au/publications/papers/Snowdon:phd.pdf
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.Re
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.Rs
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.%A Microsoft Corporation
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.%T Windows Native Processor Performance Control
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.%N Version 1.1a
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.%D November, 2002
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.%U http://msdn.microsoft.com/en-us/windows/hardware/gg463343
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.Re
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.Rs
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.%A Venkatesh Pallipadi
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.%A Alexey Starikovskiy
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.%T The Ondemand Governor. Past, Present, and Future
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.%I Intel Open Source Technology Center
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.%O Proceedings of the Linux Symposium
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.%D July, 2006
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.%U http://www.kernel.org/doc/ols/2006/ols2006v2-pages-223-238.pdf
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.Re
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.Sh HISTORY
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The
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.Nm
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device driver appeared in
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.Nx 6.0 .
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.Sh AUTHORS
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.An Jukka Ruohonen
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.Aq jruohonen@iki.fi
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.Sh CAVEATS
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At least the following caveats can be mentioned.
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.Bl -bullet
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.It
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It is currently only safe to use
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.Dv C1
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on
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.Nx .
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All other C-states are disabled by default.
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.It
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Processor thermal control (see
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.Xr acpitz 4 )
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is not yet supported.
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.It
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Depending on the processor, changes in C-, P-,
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and T-states may all skew timers and counters such as
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.Xr x86/tsc 9 .
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This is neither handled by
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.Nm
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nor by
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.Xr est 4
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or
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.Xr powernow 4 .
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.It
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There is currently neither a well-defined, machine-independent
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.Tn API
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for processor performance management nor a
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.Dq governor
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for different policies.
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It is only possible to control the
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.Tn CPU
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frequencies from userland.
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.El
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