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NetBSD/sys/arch/arm/arm32/genassym.cf
thorpej bbef46a7e9 Some ARM32_PMAP_NEW-related cleanup: 
* Define a new "MMU type", ARM_MMU_SA1.  While the SA-1's MMU is basically
  compatible with the generic, the SA-1 cache does not have a write-through
  mode, and it is useful to know have an indication of this.
* Add a new PMAP_NEEDS_PTE_SYNC indicator, and try to evaluate it at
  compile time.  We evaluate it like so:
  - If SA-1-style MMU is the only type configured -> 1
  - If SA-1-style MMU is not configured -> 0
  - Otherwise, defer to a run-time variable.
  If PMAP_NEEDS_PTE_SYNC might evaluate to true (SA-1 only or run-time
  check), then we also define PMAP_INCLUDE_PTE_SYNC so that e.g. assembly
  code can include the necessary run-time support.  PMAP_INCLUDE_PTE_SYNC
  largely replaces the ARM32_PMAP_NEEDS_PTE_SYNC manual setting Steve
  included with the original new pmap.
* In the new pmap, make pmap_pte_init_generic() check to see if the CPU
  has a write-back cache.  If so, init the PT cache mode to C=1,B=0 to get
  write-through mode.  Otherwise, init the PT cache mode to C=1,B=1.
* Add a new pmap_pte_init_arm8().  Old pmap, same as generic.  New pmap,
  sets page table cacheability to 0 (ARM8 has a write-back cache, but
  flushing it is quite expensive).
* In the new pmap, make pmap_pte_init_arm9() reset the PT cache mode to
  C=1,B=0, since the write-back check in generic gets it wrong for ARM9,
  since we use write-through mode all the time on ARM9 right now.  (What
  this really tells me is that the test for write-through cache is less
  than perfect, but we can fix that later.)
* Add a new pmap_pte_init_sa1().  Old pmap, same as generic.  New pmap,
  does generic initialization, then resets page table cache mode to
  C=1,B=1, since C=1,B=0 does not produce write-through on the SA-1.
2003-04-22 00:24:48 +00:00

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# $NetBSD: genassym.cf,v 1.23 2003/04/22 00:24:49 thorpej Exp $
# Copyright (c) 1982, 1990 The Regents of the University of California.
# All rights reserved.
#
# This code is derived from software contributed to Berkeley by
# William Jolitz.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. All advertising materials mentioning features or use of this software
# must display the following acknowledgement:
# This product includes software developed by the University of
# California, Berkeley and its contributors.
# 4. Neither the name of the University nor the names of its contributors
# may be used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
include <sys/param.h>
include <sys/systm.h>
include <sys/proc.h>
include <sys/resourcevar.h>
include <sys/device.h>
include <sys/user.h>
include <sys/signal.h>
include <uvm/uvm_extern.h>
include <arm/fiq.h>
include <machine/pmap.h>
include <machine/frame.h>
include <machine/vmparam.h>
include "opt_multiprocessor.h"
define __PROG32 1
ifdef __ARM_FIQ_INDIRECT
define __ARM_FIQ_INDIRECT 1
endif
define VM_MIN_ADDRESS VM_MIN_ADDRESS
define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS
ifndef ARM32_PMAP_NEW
define PTE_BASE PTE_BASE
else
define DOMAIN_CLIENT DOMAIN_CLIENT
define PMAP_DOMAIN_KERNEL PMAP_DOMAIN_KERNEL
endif
ifdef PMAP_INCLUDE_PTE_SYNC
define PMAP_INCLUDE_PTE_SYNC 1
endif
define PAGE_SIZE PAGE_SIZE
define UPAGES UPAGES
define PGSHIFT PGSHIFT
# Important offsets into the lwp and proc structs & associated constants
define L_FORW offsetof(struct lwp, l_forw)
define L_BACK offsetof(struct lwp, l_back)
define L_ADDR offsetof(struct lwp, l_addr)
define L_CPU offsetof(struct lwp, l_cpu)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_WCHAN offsetof(struct lwp, l_wchan)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)
define P_NRAS offsetof(struct proc, p_nras)
# Process status constants
define LSONPROC LSONPROC
define PCB_TF offsetof(struct pcb, pcb_tf)
define PCB_PAGEDIR offsetof(struct pcb, pcb_pagedir)
ifdef ARM32_PMAP_NEW
define PCB_PL1VEC offsetof(struct pcb, pcb_pl1vec)
define PCB_L1VEC offsetof(struct pcb, pcb_l1vec)
define PCB_DACR offsetof(struct pcb, pcb_dacr)
define PCB_CSTATE offsetof(struct pcb, pcb_cstate)
endif
define PCB_FLAGS offsetof(struct pcb, pcb_flags)
define PCB_R8 offsetof(struct pcb, pcb_un.un_32.pcb32_r8)
define PCB_R9 offsetof(struct pcb, pcb_un.un_32.pcb32_r9)
define PCB_R10 offsetof(struct pcb, pcb_un.un_32.pcb32_r10)
define PCB_R11 offsetof(struct pcb, pcb_un.un_32.pcb32_r11)
define PCB_R12 offsetof(struct pcb, pcb_un.un_32.pcb32_r12)
define PCB_SP offsetof(struct pcb, pcb_un.un_32.pcb32_sp)
define PCB_LR offsetof(struct pcb, pcb_un.un_32.pcb32_lr)
define PCB_PC offsetof(struct pcb, pcb_un.un_32.pcb32_pc)
define PCB_UND_SP offsetof(struct pcb, pcb_un.un_32.pcb32_und_sp)
define PCB_ONFAULT offsetof(struct pcb, pcb_onfault)
define USER_SIZE sizeof(struct user)
define V_TRAP offsetof(struct uvmexp, traps)
define V_INTR offsetof(struct uvmexp, intrs)
define V_SOFT offsetof(struct uvmexp, softs)
define VM_MAP offsetof(struct vmspace, vm_map)
define VM_PMAP offsetof(struct vmspace, vm_map.pmap)
ifdef ARM32_PMAP_NEW
define CS_TLB_ID offsetof(union pmap_cache_state, cs_tlb_id)
define CS_TLB_D offsetof(union pmap_cache_state, cs_tlb_d)
define CS_TLB offsetof(union pmap_cache_state, cs_tlb)
define CS_CACHE_ID offsetof(union pmap_cache_state, cs_cache_id)
define CS_CACHE_D offsetof(union pmap_cache_state, cs_cache_d)
define CS_CACHE offsetof(union pmap_cache_state, cs_cache)
define CS_ALL offsetof(union pmap_cache_state, cs_all)
define PMAP_CSTATE offsetof(struct pmap, pm_cstate)
endif
define PR_BASE offsetof(struct uprof, pr_base)
define PR_SIZE offsetof(struct uprof, pr_size)
define PR_OFF offsetof(struct uprof, pr_off)
define PR_SCALE offsetof(struct uprof, pr_scale)
define SIGTRAP SIGTRAP
define SIGEMT SIGEMT
define TF_R0 offsetof(struct trapframe, tf_r0)
define TF_R10 offsetof(struct trapframe, tf_r10)
define TF_PC offsetof(struct trapframe, tf_pc)
define PROCSIZE sizeof(struct proc)
define TRAPFRAMESIZE sizeof(struct trapframe)
define CF_IDCACHE_WBINV_ALL offsetof(struct cpu_functions, cf_idcache_wbinv_all)
ifdef ARM32_PMAP_NEW
define CF_DCACHE_WB_RANGE offsetof(struct cpu_functions, cf_dcache_wb_range)
define CF_TLB_FLUSHID_SE offsetof(struct cpu_functions, cf_tlb_flushID_SE)
endif
define CF_CONTEXT_SWITCH offsetof(struct cpu_functions, cf_context_switch)
define CF_SLEEP offsetof(struct cpu_functions, cf_sleep)
define CI_CURPRIORITY offsetof(struct cpu_info, ci_schedstate.spc_curpriority)
ifdef MULTIPROCESSOR
define CI_CURLWP offsetof(struct cpu_info, ci_curlwp)
define CI_CURPCB offsetof(struct cpu_info, ci_curpcb)
endif
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