138 lines
5.9 KiB
C
138 lines
5.9 KiB
C
/* $NetBSD: walnut.h,v 1.2 2001/06/24 01:13:11 simonb Exp $ */
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/* include/eval.h, openbios_walnut, walnut_bios 8/10/00 14:35:05 */
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/*-----------------------------------------------------------------------------+
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| This source code has been made available to you by IBM on an AS-IS
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| basis. Anyone receiving this source is licensed under IBM
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| copyrights to use it in any way he or she deems fit, including
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| copying it, modifying it, compiling it, and redistributing it either
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| with or without modifications. No license under IBM patents or
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| patent applications is to be implied by the copyright license.
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| Any user of this software should understand that IBM cannot provide
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| technical support for this software and will not be responsible for
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| any consequences resulting from the use of this software.
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| Any person who transfers this source code or any derivative work
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| must include the IBM copyright notice, this paragraph, and the
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| preceding two paragraphs in the transferred software.
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| COPYRIGHT I B M CORPORATION 1995
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| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
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+-----------------------------------------------------------------------------*/
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/*-----------------------------------------------------------------------------+
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| File Name: eval.h
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| Function: Openbios board specific defines. Should contain no
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| prototypes since this file gets included in assembly files.
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| Author: James Burke
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| Change Activity-
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| Date Description of Change BY
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| --------- --------------------- ---
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| 11-May-99 Created for Walnut JWB
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| 01-Jul-99 Made ROM/SRAM non-cacheable in D_CACHEABLE_REGIONS JWB
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| 08-Aug-00 Added memory regions and MMIO regions for ROM Monitor debug JWB
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| 10-Aug-00 Modified PCI memory regions JWB
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+-----------------------------------------------------------------------------*/
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#ifndef _WALNUT_H_
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#define _WALNUT_H_
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/*----------------------------------------------------------------------------+
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| 405GP PCI core memory map defines.
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+----------------------------------------------------------------------------*/
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#define MIN_PCI_MEMADDR_NOPREFETCH 0x80000000
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#define MIN_PCI_MEMADDR_PREFETCH 0xc0000000
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#define MIN_PCI_MEMADDR_VGA 0x00000000
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#define MIN_PLB_PCI_IOADDR 0xe8000000 /* PLB side of PCI I/O address space */
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#define MIN_PCI_PCI_IOADDR 0x00000000 /* PCI side of PCI I/O address space */
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#define MAX_PCI_DEVICES 5
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/*----------------------------------------------------------------------------+
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| Universal Interrupt Controller (UIC) events for the Walnut board.
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+----------------------------------------------------------------------------*/
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/* Walnut board external IRQs */
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#define EXT_IRQ_FPGA UIC_E0IS /* IRQ 25 */
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#define EXT_IRQ_SMI UIC_E1IS /* IRQ 26 */
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#define EXT_IRQ_UNUSED UIC_E2IS /* IRQ 27 */
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#define EXT_IRQ_PCI_SLOT3 UIC_E3IS /* IRQ 28 */
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#define EXT_IRQ_PCI_SLOT2 UIC_E4IS /* IRQ 29 */
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#define EXT_IRQ_PCI_SLOT1 UIC_E5IS /* IRQ 30 */
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#define EXT_IRQ_PCI_SLOT0 UIC_E6IS /* IRQ 31 */
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#define EXT_IRQ_CASCADE EXT_IRQ_FPGA
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#define EXT_IRQ_EXPANSION EXT_IRQ_FPGA
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#define EXT_IRQ_IR EXT_IRQ_FPGA
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#define EXT_IRQ_KEYBOARD EXT_IRQ_FPGA
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#define EXT_IRQ_MOUSE EXT_IRQ_FPGA
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/*-----------------------------------------------------------------------------+
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| Defines for the RTC/NVRAM.
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+-----------------------------------------------------------------------------*/
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#define NVRAM_BASE 0xf0000000
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#if 0
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#define RTC_CONTROL 0x1ff8
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#define RTC_SECONDS 0x1ff9
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#define RTC_MINUTES 0x1ffa
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#define RTC_HOURS 0x1ffb
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#define RTC_DAY 0x1ffc
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#define RTC_DATE 0x1ffd
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#define RTC_MONTH 0x1ffe
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#define RTC_YEAR 0x1fff
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#endif
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/*-----------------------------------------------------------------------------+
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| Defines for the Keyboard/Mouse controller.
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+-----------------------------------------------------------------------------*/
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#define KEY_MOUSE_BASE 0xf0100000
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#define KEY_MOUSE_DATA 0x0
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#define KEY_MOUSE_CMD 0x1 /* write only */
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#define KEY_MOUSE_STAT 0x1 /* read only */
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#if 0
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/*-----------------------------------------------------------------------------+
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| Defines for FPGA regs.
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+-----------------------------------------------------------------------------*/
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#define FPGA_BASE 0xf0300000
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#define FPGA_INT_STATUS 0x00 /* Int status - read only */
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#define FPGA_INT_ENABLE 0x01 /* Int enable */
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#define FPGA_INT_POL 0x02 /* Int polarity */
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#define FPGA_INT_TRIG 0x03 /* Int type */
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#define FPGA_BRDC 0x04 /* Board controls */
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#define FPGA_BRDS1 0x05 /* Board status - read only */
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#define FPGA_BRDS2 0x06 /* Board status - read only */
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#define SW_CLK_SRC1 0x40 /* if async pci, ext or int clk */
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#define FSEL_A 0x03 /* use for mask */
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#define FSEL_INVALID1 0x00 /* invalid FSEL_A0, FSEL_A1 settings*/
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#define FSEL_INVALID2 0x02 /* invalid FSEL_A0, FSEL_A1 settings*/
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#define FSEL_66 0x01 /* select 66Mhz async int PCI */
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#define FSEL_33 0x03 /* select 33Mhz async int PCI */
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#define FPGA_SPARE1 0x0e /* Spare inputs - read only */
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#define FPGA_SPARE2 0x0f /* Spare outputs */
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#endif
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#ifndef _LOCORE
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/*
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* Board configuration structure from the OpenBIOS.
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*/
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struct board_cfg_data {
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unsigned char usr_config_ver[4];
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unsigned char rom_sw_ver[30];
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unsigned int mem_size;
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unsigned char mac_address_local[6];
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unsigned char mac_address_pci[6];
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unsigned int processor_speed;
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unsigned int plb_speed;
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unsigned int pci_speed;
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} board_data;
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extern struct board_cfg_data board_data;
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#endif /* _LOCORE */
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#endif /* _WALNUT_H_ */
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