0fb6b9a8f8
Rather than an "iointr" routine that decomposes a vector into an IRQ, we maintain a vector table directly, hooking up each "iointr" routine at the correct vector. This also allows us to hook device interrupts up to specific vectors (c.f. Jensen). We can shave even more cycles off, here, and I will, but it requires some changes to the alpha_shared_intr stuff.
335 lines
8.9 KiB
C
335 lines
8.9 KiB
C
/* $NetBSD: jensenio_intr.c,v 1.3 2001/07/27 00:25:19 thorpej Exp $ */
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/*-
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* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: jensenio_intr.c,v 1.3 2001/07/27 00:25:19 thorpej Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/syslog.h>
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#include <machine/autoconf.h>
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#include <dev/eisa/eisavar.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <alpha/jensenio/jenseniovar.h>
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static bus_space_tag_t pic_iot;
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static bus_space_handle_t pic_ioh[2];
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static bus_space_handle_t pic_elcr_ioh;
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int jensenio_eisa_intr_map(void *, u_int, eisa_intr_handle_t *);
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const char *jensenio_eisa_intr_string(void *, int);
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const struct evcnt *jensenio_eisa_intr_evcnt(void *, int);
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void *jensenio_eisa_intr_establish(void *, int, int, int,
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int (*)(void *), void *);
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void jensenio_eisa_intr_disestablish(void *, void *);
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int jensenio_eisa_intr_alloc(void *, int, int, int *);
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#define JENSEN_MAX_IRQ 16
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struct alpha_shared_intr *jensenio_eisa_intr;
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void jensenio_iointr(void *, u_long);
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void jensenio_enable_intr(int, int);
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void jensenio_setlevel(int, int);
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void jensenio_pic_init(void);
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const int jensenio_intr_deftype[JENSEN_MAX_IRQ] = {
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IST_EDGE, /* 0: interval timer 0 output */
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IST_EDGE, /* 1: line printer */
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IST_UNUSABLE, /* 2: (cascade) */
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IST_NONE, /* 3: EISA pin B25 */
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IST_NONE, /* 4: EISA pin B24 */
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IST_NONE, /* 5: EISA pin B23 */
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IST_NONE, /* 6: EISA pin B22 (floppy) */
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IST_NONE, /* 7: EISA pin B21 */
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IST_EDGE, /* 8: RTC */
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IST_NONE, /* 9: EISA pin B04 */
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IST_NONE, /* 10: EISA pin D03 */
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IST_NONE, /* 11: EISA pin D04 */
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IST_NONE, /* 12: EISA pin D05 */
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IST_UNUSABLE, /* 13: not connected */
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IST_NONE, /* 14: EISA pin D07 (SCSI) */
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IST_NONE, /* 15: EISA pin D06 */
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};
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static __inline void
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jensenio_specific_eoi(int irq)
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{
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if (irq > 7)
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bus_space_write_1(pic_iot, pic_ioh[1],
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0, 0x20 | (irq & 0x07));
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bus_space_write_1(pic_iot, pic_ioh[0],
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0, 0x20 | (irq > 7 ? 2 : irq));
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}
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void
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jensenio_intr_init(struct jensenio_config *jcp)
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{
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eisa_chipset_tag_t ec = &jcp->jc_ec;
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isa_chipset_tag_t ic = &jcp->jc_ic;
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char *cp;
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int i;
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pic_iot = &jcp->jc_eisa_iot;
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jensenio_pic_init();
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jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ, 16);
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for (i = 0; i < JENSEN_MAX_IRQ; i++) {
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alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
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i, jensenio_intr_deftype[i]);
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/* Don't bother with stray interrupts. */
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alpha_shared_intr_set_maxstrays(jensenio_eisa_intr,
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i, 0);
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cp = alpha_shared_intr_string(jensenio_eisa_intr, i);
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sprintf(cp, "irq %d", i);
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evcnt_attach_dynamic(alpha_shared_intr_evcnt(
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jensenio_eisa_intr, i), EVCNT_TYPE_INTR,
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NULL, "eisa", cp);
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}
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/*
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* The cascasde interrupt must be edge triggered and always enabled.
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*/
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jensenio_setlevel(2, 0);
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jensenio_enable_intr(2, 1);
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/*
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* Initialize the EISA chipset.
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*/
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ec->ec_v = jcp;
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ec->ec_intr_map = jensenio_eisa_intr_map;
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ec->ec_intr_string = jensenio_eisa_intr_string;
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ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt;
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ec->ec_intr_establish = jensenio_eisa_intr_establish;
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ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish;
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/*
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* Initialize the ISA chipset.
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*/
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ic->ic_v = jcp;
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ic->ic_intr_establish = jensenio_eisa_intr_establish;
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ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish;
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ic->ic_intr_alloc = jensenio_eisa_intr_alloc;
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ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt;
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}
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int
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jensenio_eisa_intr_map(void *v, u_int eirq, eisa_intr_handle_t *ihp)
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{
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if (*ihp >= JENSEN_MAX_IRQ)
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panic("jensenio_eisa_intr_map: bogus IRQ %d\n", *ihp);
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if (jensenio_intr_deftype[eirq] == IST_UNUSABLE) {
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printf("jensenio_eisa_intr_map: unusable irq %d\n",
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eirq);
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*ihp = -1;
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return (1);
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}
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*ihp = eirq;
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return (0);
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}
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const char *
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jensenio_eisa_intr_string(void *v, int eirq)
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{
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static char irqstr[64];
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if (eirq >= JENSEN_MAX_IRQ)
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panic("jensenio_eisa_intr_string: bogus IRQ %d\n", eirq);
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sprintf(irqstr, "eisa irq %d", eirq);
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return (irqstr);
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}
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const struct evcnt *
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jensenio_eisa_intr_evcnt(void *v, int eirq)
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{
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if (eirq >= JENSEN_MAX_IRQ)
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panic("jensenio_eisa_intr_evcnt: bogus IRQ %d\n", eirq);
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return (alpha_shared_intr_evcnt(jensenio_eisa_intr, eirq));
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}
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void *
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jensenio_eisa_intr_establish(void *v, int irq, int type, int level,
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int (*fn)(void *), void *arg)
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{
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void *cookie;
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if (irq >= JENSEN_MAX_IRQ || type == IST_NONE)
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panic("jensenio_eisa_intr_establish: bogus irq or type");
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if (jensenio_intr_deftype[irq] == IST_UNUSABLE) {
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printf("jensenio_eisa_intr_establish: IRQ %d not usable\n",
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irq);
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return (NULL);
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}
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cookie = alpha_shared_intr_establish(jensenio_eisa_intr, irq,
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type, level, fn, arg, "eisa irq");
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if (cookie != NULL &&
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alpha_shared_intr_firstactive(jensenio_eisa_intr, irq)) {
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scb_set(0x800 + SCB_IDXTOVEC(irq), jensenio_iointr, NULL);
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jensenio_setlevel(irq,
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alpha_shared_intr_get_sharetype(jensenio_eisa_intr,
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irq) == IST_LEVEL);
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jensenio_enable_intr(irq, 1);
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}
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return (cookie);
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}
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void
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jensenio_eisa_intr_disestablish(void *v, void *cookie)
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{
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struct alpha_shared_intrhand *ih = cookie;
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int s, irq = ih->ih_num;
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s = splhigh();
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/* Remove it from the link. */
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alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie,
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"eisa irq");
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if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) {
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jensenio_enable_intr(irq, 0);
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alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
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irq, jensenio_intr_deftype[irq]);
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scb_free(0x800 + SCB_IDXTOVEC(irq));
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}
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splx(s);
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}
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int
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jensenio_eisa_intr_alloc(void *v, int mask, int type, int *rqp)
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{
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/* XXX Not supported right now. */
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return (1);
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}
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void
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jensenio_iointr(void *framep, u_long vec)
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{
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int irq;
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irq = SCB_VECTOIDX(vec - 0x800);
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if (!alpha_shared_intr_dispatch(jensenio_eisa_intr, irq))
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alpha_shared_intr_stray(jensenio_eisa_intr, irq, "eisa irq");
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jensenio_specific_eoi(irq);
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}
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void
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jensenio_enable_intr(int irq, int onoff)
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{
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int pic;
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u_int8_t bit, mask;
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pic = irq >> 3;
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bit = 1 << (irq & 0x7);
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mask = bus_space_read_1(pic_iot, pic_ioh[pic], 1);
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if (onoff)
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mask &= ~bit;
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else
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mask |= bit;
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bus_space_write_1(pic_iot, pic_ioh[pic], 1, mask);
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}
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void
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jensenio_setlevel(int irq, int level)
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{
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int elcr;
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u_int8_t bit, mask;
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elcr = irq >> 3;
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bit = 1 << (irq & 0x7);
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mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
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if (level)
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mask |= bit;
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else
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mask &= ~bit;
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bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
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}
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void
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jensenio_pic_init(void)
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{
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static const int picaddr[2] = { IO_ICU1, IO_ICU2 };
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int pic;
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/*
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* Map the PICs and mask off the interrupts on them.
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*/
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for (pic = 0; pic < 2; pic++) {
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if (bus_space_map(pic_iot, picaddr[pic], 2, 0, &pic_ioh[pic]))
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panic("jensenio_init_intr: unable to map PIC %d", pic);
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bus_space_write_1(pic_iot, pic_ioh[pic], 1, 0xff);
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}
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/*
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* Map the ELCR registers.
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*/
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if (bus_space_map(pic_iot, 0x4d0, 2, 0, &pic_elcr_ioh))
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panic("jensenio_init_intr: unable to map ELCR registers");
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}
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