208 lines
9.7 KiB
C
208 lines
9.7 KiB
C
/* $NetBSD: pmap_pvt.h,v 1.8 1999/09/19 19:06:19 chs Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jeremy Cooper.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SUN3X_PMAPPVT_H
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#define _SUN3X_PMAPPVT_H
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/*************************** TMGR STRUCTURES ***************************
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* The sun3x 'tmgr' structures contain MMU tables and additional *
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* information about their current usage and availability. *
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***********************************************************************/
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typedef struct a_tmgr_struct a_tmgr_t;
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typedef struct b_tmgr_struct b_tmgr_t;
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typedef struct c_tmgr_struct c_tmgr_t;
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/* A level A table manager contains a pointer to an MMU table of long
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* format table descriptors (an 'A' table), a pointer to the pmap
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* currently using the table, and the number of wired and active entries
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* it contains.
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*/
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struct a_tmgr_struct {
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pmap_t at_parent; /* pmap currently using this table */
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mmu_long_dte_t *at_dtbl; /* the MMU table being managed */
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u_char at_wcnt; /* no. of wired entries in this table */
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u_char at_ecnt; /* no. of valid entries in this table */
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u_int16_t at_dum1; /* structure padding */
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TAILQ_ENTRY(a_tmgr_struct) at_link; /* list linker */
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};
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/* A level B table manager contains a pointer to an MMU table of
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* short format table descriptors (a 'B' table), a pointer to the level
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* A table manager currently using it, the index of this B table
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* within that parent A table, and the number of wired and active entries
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* it currently contains.
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*/
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struct b_tmgr_struct {
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a_tmgr_t *bt_parent; /* Parent 'A' table manager */
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mmu_short_dte_t *bt_dtbl; /* the MMU table being managed */
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u_char bt_pidx; /* this table's index in the parent */
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u_char bt_wcnt; /* no. of wired entries in table */
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u_char bt_ecnt; /* no. of valid entries in table */
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u_char bt_dum1; /* structure padding */
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TAILQ_ENTRY(b_tmgr_struct) bt_link; /* list linker */
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};
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/* A level 'C' table manager consists of pointer to an MMU table of short
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* format page descriptors (a 'C' table), a pointer to the level B table
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* manager currently using it, and the number of wired and active pages
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* it currently contains.
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*
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* Additionally, the table manager contains a pointer to the pmap
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* that is currently using it and the starting virtual address of the
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* range that the MMU table manages. These two items can be obtained
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* through the traversal of other table manager structures, but having
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* them close at hand helps speed up operations in the PV system.
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*/
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struct c_tmgr_struct {
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b_tmgr_t *ct_parent; /* Parent 'B' table manager */
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mmu_short_pte_t *ct_dtbl; /* the MMU table being managed */
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u_char ct_pidx; /* this table's index in the parent */
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u_char ct_wcnt; /* no. of wired entries in table */
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u_char ct_ecnt; /* no. of valid entries in table */
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u_char ct_dum1; /* structure padding */
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TAILQ_ENTRY(c_tmgr_struct) ct_link; /* list linker */
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#define MMU_SHORT_PTE_WIRED MMU_SHORT_PTE_UN1
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#define MMU_PTE_WIRED ((*pte)->attr.raw & MMU_SHORT_PTE_WIRED)
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pmap_t ct_pmap; /* pmap currently using this table */
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vm_offset_t ct_va; /* starting va that this table maps */
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};
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/* The Mach VM code requires that the pmap module be able to apply
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* several different operations on all page descriptors that map to a
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* given physical address. A few of these are:
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* + invalidate all mappings to a page.
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* + change the type of protection on all mappings to a page.
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* + determine if a physical page has been written to
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* + determine if a physical page has been accessed (read from)
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* + clear such information
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* The collection of structures and tables which we used to make this
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* possible is known as the 'Physical to Virtual' or 'PV' system.
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*
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* Every physical page of memory managed by the virtual memory system
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* will have a structure which describes whether or not it has been
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* modified or referenced, and contains a list of page descriptors that
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* are currently mapped to it (if any). This array of structures is
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* known as the 'PV' list.
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*
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** Old PV Element structure
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* To keep a list of page descriptors currently using the page, another
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* structure had to be invented. Its sole purpose is to be a link in
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* a chain of such structures. No other information is contained within
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* the structure however! The other piece of information it holds is
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* hidden within its address. By maintaining a one-to-one correspondence
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* of page descriptors in the system and such structures, this address can
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* readily be translated into its associated page descriptor by using a
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* simple macro. This bizzare structure is simply known as a 'PV
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* Element', or 'pve' for short.
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*
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** New PV Element structure
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* To keep a list of page descriptors currently using the page, another
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* structure had to be invented. Its sole purpose is to indicate the index
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* of the next PTE currently referencing the page. By maintaining a one-to-
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* one correspondence of page descriptors in the system and such structures,
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* this same index is also the index of the next PV element, which describes
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* the index of yet another page mapped to the same address and so on. The
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* special index 'PVE_EOL' is used to represent the end of the list.
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*/
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struct pv_struct {
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u_short pv_idx; /* Index of PTE using this page */
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u_short pv_flags; /* Physical page status flags */
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#define PV_FLAGS_USED MMU_SHORT_PTE_USED
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#define PV_FLAGS_MDFY MMU_SHORT_PTE_M
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};
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typedef struct pv_struct pv_t;
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struct pv_elem_struct {
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u_short pve_next;
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#define PVE_EOL 0xffff /* End-of-list marker */
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};
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typedef struct pv_elem_struct pv_elem_t;
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/* Physical memory on the 3/80 is not contiguous. The ROM Monitor
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* provides us with a linked list of memory segments describing each
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* segment with its base address and its size.
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*/
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struct pmap_physmem_struct {
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vm_offset_t pmem_start; /* Starting physical address */
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vm_offset_t pmem_end; /* First byte outside of range */
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int pmem_pvbase; /* Offset within the pv list */
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struct pmap_physmem_struct *pmem_next; /* Next block of memory */
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};
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/* Internal function definitions. */
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a_tmgr_t *get_a_table __P((void));
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b_tmgr_t *get_b_table __P((void));
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c_tmgr_t *get_c_table __P((void));
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int free_a_table __P((a_tmgr_t *, boolean_t));
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int free_b_table __P((b_tmgr_t *, boolean_t));
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int free_c_table __P((c_tmgr_t *, boolean_t));
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void pmap_bootstrap_aalign __P((int));
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void pmap_alloc_usermmu __P((void));
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void pmap_alloc_usertmgr __P((void));
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void pmap_alloc_pv __P((void));
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void pmap_init_a_tables __P((void));
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void pmap_init_b_tables __P((void));
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void pmap_init_c_tables __P((void));
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void pmap_init_pv __P((void));
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void pmap_clear_pv __P((vm_offset_t, int));
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boolean_t pmap_remove_a __P((a_tmgr_t *, vm_offset_t, vm_offset_t));
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boolean_t pmap_remove_b __P((b_tmgr_t *, vm_offset_t, vm_offset_t));
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boolean_t pmap_remove_c __P((c_tmgr_t *, vm_offset_t, vm_offset_t));
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void pmap_remove_pte __P((mmu_short_pte_t *));
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void pmap_enter_kernel __P((vm_offset_t, vm_offset_t, vm_prot_t));
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void pmap_remove_kernel __P((vm_offset_t, vm_offset_t));
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void pmap_protect_kernel __P((vm_offset_t, vm_offset_t, vm_prot_t));
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boolean_t pmap_extract_kernel __P((vaddr_t, paddr_t *));
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vm_offset_t pmap_get_pteinfo __P((u_int, pmap_t *, c_tmgr_t **));
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void pmap_pinit __P((pmap_t));
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int pmap_dereference __P((pmap_t));
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boolean_t is_managed __P((vm_offset_t));
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boolean_t pmap_stroll __P((pmap_t, vm_offset_t, a_tmgr_t **, b_tmgr_t **,\
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c_tmgr_t **, mmu_short_pte_t **, int *, int *, int *));
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void pmap_bootstrap_copyprom __P((void));
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void pmap_takeover_mmu __P((void));
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void pmap_bootstrap_setprom __P((void));
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/* Debugging function definitions */
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void pv_list __P((vm_offset_t, int));
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/* These are defined in pmap.c */
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extern struct pmap_physmem_struct avail_mem[];
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#endif /* _SUN3X_MYPMAP_H */
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