7a43c0e46b
(SCB_VECTOIDX(vec) - SCB_IOVECBASE] -> SCB_VECTOIDX(vec - SCB_IOVECBASE)) Sigh. This is all very good work- this new interrupt stuff. Yet like the last time my good friend Jason 'simplified' things, we lost information. It used to be you could tell which specific slot an interrupt was frame based upon the vector. Now you can't because they're allocated dynamically. Oh well- it's not all that important.
287 lines
7.0 KiB
C
287 lines
7.0 KiB
C
/* $NetBSD: pci_kn8ae.c,v 1.20 2001/08/13 23:36:30 mjacob Exp $ */
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/*
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* Copyright (c) 1997 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.20 2001/08/13 23:36:30 mjacob Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/syslog.h>
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#include <uvm/uvm_extern.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/dwlpxreg.h>
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#include <alpha/pci/dwlpxvar.h>
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#include <alpha/pci/pci_kn8ae.h>
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int dec_kn8ae_intr_map __P((struct pci_attach_args *,
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pci_intr_handle_t *));
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const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t));
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const struct evcnt *dec_kn8ae_intr_evcnt __P((void *, pci_intr_handle_t));
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void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t,
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int, int (*func)(void *), void *));
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void dec_kn8ae_intr_disestablish __P((void *, void *));
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static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC];
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void kn8ae_spurious __P((void *, u_long));
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void kn8ae_enadis_intr __P((struct dwlpx_config *, pci_intr_handle_t, int));
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void
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pci_kn8ae_pickintr(ccp, first)
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struct dwlpx_config *ccp;
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int first;
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{
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int io, hose, dev;
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pci_chipset_tag_t pc = &ccp->cc_pc;
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pc->pc_intr_v = ccp;
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pc->pc_intr_map = dec_kn8ae_intr_map;
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pc->pc_intr_string = dec_kn8ae_intr_string;
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pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt;
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pc->pc_intr_establish = dec_kn8ae_intr_establish;
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pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish;
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/* Not supported on KN8AE. */
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pc->pc_pciide_compat_intr_establish = NULL;
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if (!first) {
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return;
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}
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for (io = 0; io < DWLPX_NIONODE; io++) {
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for (hose = 0; hose < DWLPX_NHOSE; hose++) {
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for (dev = 0; dev < NHPC; dev++) {
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imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT;
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}
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}
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}
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}
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#define IH_MAKE(vec, dev, pin) \
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((vec) | ((dev) << 16) | ((pin) << 24))
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#define IH_VEC(ih) ((ih) & 0xffff)
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#define IH_DEV(ih) (((ih) >> 16) & 0xff)
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#define IH_PIN(ih) (((ih) >> 24) & 0xff)
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int
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dec_kn8ae_intr_map(pa, ihp)
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struct pci_attach_args *pa;
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pci_intr_handle_t *ihp;
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{
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pcitag_t bustag = pa->pa_intrtag;
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int buspin = pa->pa_intrpin;
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pci_chipset_tag_t pc = pa->pa_pc;
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int device;
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u_long vec;
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if (buspin == 0) {
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/* No IRQ used. */
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return 1;
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}
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if (buspin > 4) {
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printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin);
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return 1;
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}
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alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL);
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vec = scb_alloc(kn8ae_spurious, NULL);
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if (vec == SCB_ALLOC_FAILED) {
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printf("dec_kn8ae_intr_map: no vector available for "
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"device %d pin %d\n", device, buspin);
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return 1;
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}
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*ihp = IH_MAKE(vec, device, buspin);
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return (0);
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}
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const char *
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dec_kn8ae_intr_string(ccv, ih)
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void *ccv;
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pci_intr_handle_t ih;
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{
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static char irqstr[64];
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sprintf(irqstr, "vector 0x%lx", IH_VEC(ih));
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return (irqstr);
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}
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const struct evcnt *
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dec_kn8ae_intr_evcnt(ccv, ih)
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void *ccv;
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pci_intr_handle_t ih;
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{
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/* XXX for now, no evcnt parent reported */
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return (NULL);
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}
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void *
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dec_kn8ae_intr_establish(ccv, ih, level, func, arg)
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void *ccv;
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pci_intr_handle_t ih;
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int level;
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int (*func) __P((void *));
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void *arg;
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{
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struct dwlpx_config *ccp = ccv;
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void *cookie;
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struct scbvec *scb;
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u_long vec;
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int pin, device, hpc;
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device = IH_DEV(ih);
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pin = IH_PIN(ih);
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vec = IH_VEC(ih);
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scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)];
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if (scb->scb_func != kn8ae_spurious) {
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printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n",
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vec);
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return (NULL);
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}
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/*
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* NOTE: The PCIA hardware doesn't support interrupt sharing,
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* so we don't have to worry about it (in theory, at least).
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*/
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scb->scb_arg = arg;
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alpha_mb();
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scb->scb_func = (void (*)(void *, u_long))func;
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alpha_mb();
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if (device < 4) {
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hpc = 0;
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} else if (device < 8) {
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device -= 4;
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hpc = 1;
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} else {
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device -= 8;
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hpc = 2;
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}
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REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec;
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kn8ae_enadis_intr(ccp, ih, 1);
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cookie = (void *) ih;
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return (cookie);
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}
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void
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dec_kn8ae_intr_disestablish(ccv, cookie)
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void *ccv, *cookie;
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{
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struct dwlpx_config *ccp = ccv;
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pci_intr_handle_t ih = (u_long) cookie;
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struct scbvec *scb;
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u_long vec;
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vec = IH_VEC(ih);
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scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)];
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kn8ae_enadis_intr(ccp, ih, 0);
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scb_free(vec);
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}
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void
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kn8ae_spurious(void *arg, u_long vec)
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{
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printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec);
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}
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void
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kn8ae_enadis_intr(ccp, irq, onoff)
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struct dwlpx_config *ccp;
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pci_intr_handle_t irq;
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int onoff;
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{
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struct dwlpx_softc *sc = ccp->cc_sc;
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unsigned long paddr;
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u_int32_t val;
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int ionode, hose, device, hpc, busp, s;
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ionode = sc->dwlpx_node - 4;
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hose = sc->dwlpx_hosenum;
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device = IH_DEV(irq);
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busp = (1 << (IH_PIN(irq) - 1));
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paddr = (1LL << 39);
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paddr |= (unsigned long) ionode << 36;
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paddr |= (unsigned long) hose << 34;
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if (device < 4) {
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hpc = 0;
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} else if (device < 8) {
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hpc = 1;
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device -= 4;
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} else {
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hpc = 2;
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device -= 8;
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}
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busp <<= (device << 2);
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val = imaskcache[ionode][hose][hpc];
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if (onoff)
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val |= busp;
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else
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val &= ~busp;
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imaskcache[ionode][hose][hpc] = val;
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#if 0
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printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n",
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onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose);
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#endif
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s = splhigh();
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REGVAL(PCIA_IMASK(hpc) + paddr) = val;
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alpha_mb();
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(void) splx(s);
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}
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