163 lines
4.0 KiB
C
163 lines
4.0 KiB
C
/* $NetBSD: lock.h,v 1.16 2008/04/28 20:23:23 martin Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center, and Matthew Fredette.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-dependent spin lock operations.
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*/
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#ifndef _HPPA_LOCK_H_
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#define _HPPA_LOCK_H_
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#include <sys/stdint.h>
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#define HPPA_LDCW_ALIGN 16
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#define __SIMPLELOCK_ALIGN(p) \
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(volatile unsigned long *)(((uintptr_t)(p) + HPPA_LDCW_ALIGN - 1) & \
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~(HPPA_LDCW_ALIGN - 1))
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#define __SIMPLELOCK_RAW_LOCKED 0
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#define __SIMPLELOCK_RAW_UNLOCKED 1
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static __inline int
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__SIMPLELOCK_LOCKED_P(__cpu_simple_lock_t *__ptr)
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{
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return *__SIMPLELOCK_ALIGN(__ptr) == __SIMPLELOCK_RAW_LOCKED;
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}
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static __inline int
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__SIMPLELOCK_UNLOCKED_P(__cpu_simple_lock_t *__ptr)
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{
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return *__SIMPLELOCK_ALIGN(__ptr) == __SIMPLELOCK_RAW_UNLOCKED;
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}
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static __inline int
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__ldcw(volatile unsigned long *__ptr)
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{
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int __val;
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__asm volatile("ldcw 0(%1), %0"
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: "=r" (__val) : "r" (__ptr)
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: "memory");
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return __val;
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}
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static __inline void
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__sync(void)
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{
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__asm volatile("sync\n"
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: /* no outputs */
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: /* no inputs */
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: "memory");
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}
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static __inline void
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__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
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{
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alp->csl_lock[0] = alp->csl_lock[1] =
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alp->csl_lock[2] = alp->csl_lock[3] =
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__SIMPLELOCK_RAW_UNLOCKED;
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__sync();
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}
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static __inline void
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__cpu_simple_lock(__cpu_simple_lock_t *alp)
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{
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volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
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/*
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* Note, if we detect that the lock is held when
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* we do the initial load-clear-word, we spin using
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* a non-locked load to save the coherency logic
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* some work.
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*/
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while (__ldcw(__aptr) == __SIMPLELOCK_RAW_LOCKED)
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while (*__aptr == __SIMPLELOCK_RAW_LOCKED)
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;
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}
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static __inline int
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__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
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{
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volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
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return (__ldcw(__aptr) != __SIMPLELOCK_RAW_LOCKED);
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}
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static __inline void
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__cpu_simple_unlock(__cpu_simple_lock_t *alp)
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{
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volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
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__sync();
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*__aptr = __SIMPLELOCK_RAW_UNLOCKED;
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}
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static __inline void
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__cpu_simple_lock_set(__cpu_simple_lock_t *alp)
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{
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volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
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*__aptr = __SIMPLELOCK_RAW_LOCKED;
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}
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static __inline void
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__cpu_simple_lock_clear(__cpu_simple_lock_t *alp)
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{
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volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
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*__aptr = __SIMPLELOCK_RAW_UNLOCKED;
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}
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static __inline void
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mb_read(void)
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{
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__sync();
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}
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static __inline void
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mb_write(void)
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{
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__sync();
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}
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static __inline void
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mb_memory(void)
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{
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__sync();
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}
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#endif /* _HPPA_LOCK_H_ */
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