351 lines
9.2 KiB
C
351 lines
9.2 KiB
C
/* Disassembler for the Pyramid Technology 90x
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Copyright (C) 1988,1989 Free Software Foundation, Inc.
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This file is part of GDB, the GNU disassembler.
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GDB is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 1, or (at your option)
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any later version.
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GDB is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GDB; see the file COPYING. If not, write to
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the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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#ifndef lint
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static char rcsid[] = "$Id: pyr-pinsn.c,v 1.2 1993/08/02 17:40:20 mycroft Exp $";
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#endif /* not lint */
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#include <stdio.h>
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#include "defs.h"
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#include "param.h"
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#include "symtab.h"
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#include "opcode.h"
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/* A couple of functions used for debugging frame-handling on
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Pyramids. (The Pyramid-dependent handling of register values for
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windowed registers is known to be buggy.)
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When debugging, these functions supplant the normal definitions of some
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of the macros in m-pyramid.h The quantity of information produced
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when these functions are used makes the gdb unusable as a
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debugger for user programs. */
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extern unsigned pyr_saved_pc(), pyr_frame_chain();
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CORE_ADDR pyr_frame_chain(frame)
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CORE_ADDR frame;
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{
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int foo=frame - CONTROL_STACK_FRAME_SIZE;
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/* printf ("...following chain from %x: got %x\n", frame, foo);*/
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return foo;
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}
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CORE_ADDR pyr_saved_pc(frame)
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CORE_ADDR frame;
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{
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int foo=0;
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foo = read_memory_integer (((CORE_ADDR)(frame))+60, 4);
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printf ("..reading pc from frame 0x%0x+%d regs: got %0x\n",
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frame, 60/4, foo);
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return foo;
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}
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/* Pyramid instructions are never longer than this many bytes. */
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#define MAXLEN 24
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/* Number of elements in the opcode table. */
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/*const*/ static int nopcodes = (sizeof (pyr_opcodes) / sizeof( pyr_opcodes[0]));
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#define NOPCODES (nopcodes)
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extern char *reg_names[];
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/* Let's be byte-independent so we can use this as a cross-assembler.
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(will this ever be useful?
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*/
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#define NEXTLONG(p) \
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(p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
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/* Print one instruction at address MEMADDR in debugged memory,
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on STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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FILE *stream;
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{
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unsigned char buffer[MAXLEN];
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register int i, nargs, insn_size =4;
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register unsigned char *p;
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register char *d;
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register int insn_opcode, operand_mode;
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register int index_multiplier, index_reg_regno, op_1_regno, op_2_regno ;
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long insn; /* first word of the insn, not broken down. */
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pyr_insn_format insn_decode; /* the same, broken out into op{code,erands} */
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long extra_1, extra_2;
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read_memory (memaddr, buffer, MAXLEN);
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insn_decode = *((pyr_insn_format *) buffer);
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insn = * ((int *) buffer);
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insn_opcode = insn_decode.operator;
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operand_mode = insn_decode.mode;
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index_multiplier = insn_decode.index_scale;
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index_reg_regno = insn_decode.index_reg;
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op_1_regno = insn_decode.operand_1;
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op_2_regno = insn_decode.operand_2;
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if (*((int *)buffer) == 0x0) {
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/* "halt" looks just like an invalid "jump" to the insn decoder,
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so is dealt with as a special case */
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fprintf (stream, "halt");
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return (4);
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}
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for (i = 0; i < NOPCODES; i++)
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if (pyr_opcodes[i].datum.code == insn_opcode)
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break;
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if (i == NOPCODES)
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/* FIXME: Handle unrecognised instructions better. */
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fprintf (stream, "???\t#%08x\t(op=%x mode =%x)",
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insn, insn_decode.operator, insn_decode.mode);
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else
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{
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/* Print the mnemonic for the instruction. Pyramid insn operands
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are so regular that we can deal with almost all of them
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separately.
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Unconditional branches are an exception: they are encoded as
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conditional branches (branch if false condition, I think)
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with no condition specified. The average user will not be
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aware of this. To maintain their illusion that an
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unconditional branch insn exists, we will have to FIXME to
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treat the insn mnemnonic of all branch instructions here as a
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special case: check the operands of branch insn and print an
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appropriate mnemonic. */
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fprintf (stream, "%s\t", pyr_opcodes[i].name);
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/* Print the operands of the insn (as specified in
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insn.operand_mode).
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Branch operands of branches are a special case: they are a word
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offset, not a byte offset. */
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if (insn_decode.operator == 0x01 || insn_decode.operator == 0x02) {
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register int bit_codes=(insn >> 16)&0xf;
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register int i;
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register int displacement = (insn & 0x0000ffff) << 2;
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static char cc_bit_names[] = "cvzn"; /* z,n,c,v: strange order? */
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/* Is bfc and no bits specified an unconditional branch?*/
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for (i=0;i<4;i++) {
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if ((bit_codes) & 0x1)
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fputc (cc_bit_names[i], stream);
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bit_codes >>= 1;
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}
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fprintf (stream, ",%0x",
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displacement + memaddr);
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return (insn_size);
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}
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switch (operand_mode) {
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case 0:
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fprintf (stream, "%s,%s",
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reg_names [op_1_regno],
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reg_names [op_2_regno]);
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break;
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case 1:
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fprintf (stream, " 0x%0x,%s",
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op_1_regno,
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reg_names [op_2_regno]);
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break;
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case 2:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream, " $0x%0x,%s",
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extra_1,
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reg_names [op_2_regno]);
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break;
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case 3:
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fprintf (stream, " (%s),%s",
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reg_names [op_1_regno],
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reg_names [op_2_regno]);
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break;
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case 4:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream, " 0x%0x(%s),%s",
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extra_1,
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reg_names [op_1_regno],
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reg_names [op_2_regno]);
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break;
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/* S1 destination mode */
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case 5:
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fprintf (stream,
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((index_reg_regno) ? "%s,(%s)[%s*%1d]" : "%s,(%s)"),
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reg_names [op_1_regno],
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 6:
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fprintf (stream,
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((index_reg_regno) ? " $%#0x,(%s)[%s*%1d]"
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: " $%#0x,(%s)"),
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op_1_regno,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 7:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno) ? " $%#0x,(%s)[%s*%1d]"
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: " $%#0x,(%s)"),
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extra_1,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 8:
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fprintf (stream,
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((index_reg_regno) ? " (%s),(%s)[%s*%1d]" : " (%s),(%s)"),
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reg_names [op_1_regno],
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 9:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno)
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? "%#0x(%s),(%s)[%s*%1d]"
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: "%#0x(%s),(%s)"),
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extra_1,
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reg_names [op_1_regno],
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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/* S2 destination mode */
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case 10:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno) ? "%s,%#0x(%s)[%s*%1d]" : "%s,%#0x(%s)"),
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reg_names [op_1_regno],
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extra_1,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 11:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno) ?
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" $%#0x,%#0x(%s)[%s*%1d]" : " $%#0x,%#0x(%s)"),
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op_1_regno,
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extra_1,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 12:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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read_memory (memaddr+8, buffer, MAXLEN);
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insn_size += 4;
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extra_2 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno) ?
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" $%#0x,%#0x(%s)[%s*%1d]" : " $%#0x,%#0x(%s)"),
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extra_1,
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extra_2,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 13:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno)
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? " (%s),%#0x(%s)[%s*%1d]"
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: " (%s),%#0x(%s)"),
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reg_names [op_1_regno],
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extra_1,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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case 14:
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read_memory (memaddr+4, buffer, MAXLEN);
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insn_size += 4;
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extra_1 = * ((int *) buffer);
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read_memory (memaddr+8, buffer, MAXLEN);
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insn_size += 4;
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extra_2 = * ((int *) buffer);
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fprintf (stream,
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((index_reg_regno) ? "%#0x(%s),%#0x(%s)[%s*%1d]"
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: "%#0x(%s),%#0x(%s) "),
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extra_1,
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reg_names [op_1_regno],
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extra_2,
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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break;
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default:
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fprintf (stream,
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((index_reg_regno) ? "%s,%s [%s*%1d]" : "%s,%s"),
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reg_names [op_1_regno],
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reg_names [op_2_regno],
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reg_names [index_reg_regno],
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index_multiplier);
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fprintf (stream,
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"\t\t# unknown mode in %08x",
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insn);
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break;
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} /* switch */
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}
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{
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return insn_size;
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}
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abort ();
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}
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