216b4f1c81
dma_intr().
81 lines
2.7 KiB
C
81 lines
2.7 KiB
C
/* $NetBSD: iomd_dma.h,v 1.2 2002/02/18 11:41:18 bjh21 Exp $ */
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/*
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* Copyright (c) 1997 Scott Stevens
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Scott Stevens.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)dmavar.h
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*/
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/*
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* dma structures
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*/
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struct dma_ctrl {
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int dc_flags;
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int dc_channel;
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int dc_dmasize;
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volatile u_int *dc_cura;
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volatile u_int *dc_enda;
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volatile u_int *dc_curb;
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volatile u_int *dc_endb;
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volatile u_char *dc_cr;
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volatile u_char *dc_st;
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u_char *dc_nextaddr;
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int dc_len;
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irqhandler_t dc_ih;
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};
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#define DMA_FL_ACTIVE 0x01
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#define DMA_FL_READY 0x02
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#define DMA_CR_CLEAR 0x80
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#define DMA_CR_DIR 0x40
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#define DMA_CR_ENABLE 0x20
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#define DMA_CR_INC 0x1f
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#define DMA_ST_CHAN 0x01
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#define DMA_ST_INT 0x02
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#define DMA_ST_OVER 0x04
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#define DMA_ST_MASK (DMA_ST_CHAN | DMA_ST_INT | DMA_ST_OVER)
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#define DMA_END_STOP 0x80000000
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#define DMA_END_LAST 0x40000000
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/* Prototypes */
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struct dma_ctrl *dma_init __P((int, int, int, int));
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void dma_go __P((struct dma_ctrl *));
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int dma_reset __P((struct dma_ctrl *));
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int dma_setup __P((struct dma_ctrl *, u_char *, int, int));
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int dma_isactive __P((struct dma_ctrl *));
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int dma_isintr __P((struct dma_ctrl *));
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int dma_intr __P((void *));
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