272 lines
9.5 KiB
C
272 lines
9.5 KiB
C
/* $NetBSD: cpu.h,v 1.52 2001/02/27 22:00:19 mjacob Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center, and by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: cpu.h 1.16 91/03/25$
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*
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* @(#)cpu.h 8.4 (Berkeley) 1/5/94
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*/
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#ifndef _ALPHA_CPU_H_
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#define _ALPHA_CPU_H_
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#if defined(_KERNEL) && !defined(_LKM)
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#include "opt_multiprocessor.h"
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#include "opt_lockdebug.h"
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#endif
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/*
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* Exported definitions unique to Alpha cpu support.
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*/
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#include <machine/alpha_cpu.h>
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#ifdef _KERNEL
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#include <sys/sched.h>
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#include <machine/frame.h>
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/*
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* Machine check information.
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*/
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struct mchkinfo {
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__volatile int mc_expected; /* machine check is expected */
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__volatile int mc_received; /* machine check was received */
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};
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struct cpu_info {
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/*
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* Public members.
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*/
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struct schedstate_percpu ci_schedstate; /* scheduler state */
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#if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
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u_long ci_spin_locks; /* # of spin locks held */
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u_long ci_simple_locks; /* # of simple locks held */
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#endif
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struct proc *ci_curproc; /* current owner of the processor */
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/*
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* Private members.
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*/
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struct mchkinfo ci_mcinfo; /* machine check info */
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cpuid_t ci_cpuid; /* our CPU ID */
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struct proc *ci_fpcurproc; /* current owner of the FPU */
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paddr_t ci_curpcb; /* PA of current HW PCB */
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struct pcb *ci_idle_pcb; /* our idle PCB */
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paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */
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struct cpu_softc *ci_softc; /* pointer to our device */
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u_long ci_want_resched; /* preempt current process */
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u_long ci_intrdepth; /* interrupt trap depth */
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struct trapframe *ci_db_regs; /* registers for debuggers */
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#if defined(MULTIPROCESSOR)
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__volatile u_long ci_flags; /* flags; see below */
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__volatile u_long ci_ipis; /* interprocessor interrupts pending */
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#endif
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};
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#define CPUF_PRIMARY 0x01 /* CPU is primary CPU */
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#define CPUF_PRESENT 0x02 /* CPU is present */
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#define CPUF_RUNNING 0x04 /* CPU is running */
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#define CPUF_PAUSED 0x08 /* CPU is paused */
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#if defined(MULTIPROCESSOR)
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extern __volatile u_long cpus_running;
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extern __volatile u_long cpus_paused;
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extern struct cpu_info cpu_info[];
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#define curcpu() ((struct cpu_info *)alpha_pal_rdval())
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#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
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void cpu_boot_secondary_processors(void);
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void cpu_pause_resume(unsigned long, int);
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void cpu_pause_resume_all(int);
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#else /* ! MULTIPROCESSOR */
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extern struct cpu_info cpu_info_store;
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#define curcpu() (&cpu_info_store)
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#endif /* MULTIPROCESSOR */
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#define curproc curcpu()->ci_curproc
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#define fpcurproc curcpu()->ci_fpcurproc
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#define curpcb curcpu()->ci_curpcb
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extern u_long cpu_implver; /* from IMPLVER instruction */
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extern u_long cpu_amask; /* from AMASK instruction */
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/*
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* definitions of cpu-dependent requirements
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* referenced in generic code
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*/
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#define cpu_wait(p) /* nothing */
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#define cpu_number() alpha_pal_whami()
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/*
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* Arguments to hardclock and gatherstats encapsulate the previous
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* machine state in an opaque clockframe. One the Alpha, we use
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* what we push on an interrupt (a trapframe).
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*/
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struct clockframe {
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struct trapframe cf_tf;
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};
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#define CLKF_USERMODE(framep) \
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(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
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#define CLKF_BASEPRI(framep) \
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(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_IPL_MASK) == 0)
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#define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC])
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/*
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* This isn't perfect; if the clock interrupt comes in before the
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* r/m/w cycle is complete, we won't be counted... but it's not
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* like this stastic has to be extremely accurate.
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*/
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#define CLKF_INTR(framep) (curcpu()->ci_intrdepth)
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/*
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* This is used during profiling to integrate system time. It can safely
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* assume that the process is resident.
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*/
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#define PROC_PC(p) ((p)->p_md.md_tf->tf_regs[FRAME_PC])
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/*
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* Preempt the current process if in interrupt from user mode,
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* or after the current trap/syscall if in system mode.
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*/
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#define need_resched(ci) \
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do { \
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(ci)->ci_want_resched = 1; \
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if ((ci)->ci_curproc != NULL) \
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aston((ci)->ci_curproc); \
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} while (/*CONSTCOND*/0)
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/*
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* Give a profiling tick to the current process when the user profiling
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* buffer pages are invalid. On the Alpha, request an AST to send us
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* through trap, marking the proc as needing a profiling tick.
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*/
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#define need_proftick(p) \
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do { \
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(p)->p_flag |= P_OWEUPC; \
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aston(p); \
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} while (/*CONSTCOND*/0)
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define signotify(p) aston(p)
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/*
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* XXXSMP
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* Should we send an AST IPI? Or just let it handle it next time
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* it sees a normal kernel entry? I guess letting it happen later
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* follows the `asynchronous' part of the name...
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*/
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#define aston(p) ((p)->p_md.md_astpending = 1)
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#endif /* _KERNEL */
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/*
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* CTL_MACHDEP definitions.
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*/
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#define CPU_CONSDEV 1 /* dev_t: console terminal device */
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#define CPU_ROOT_DEVICE 2 /* string: root device name */
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#define CPU_UNALIGNED_PRINT 3 /* int: print unaligned accesses */
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#define CPU_UNALIGNED_FIX 4 /* int: fix unaligned accesses */
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#define CPU_UNALIGNED_SIGBUS 5 /* int: SIGBUS unaligned accesses */
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#define CPU_BOOTED_KERNEL 6 /* string: booted kernel name */
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#define CPU_MAXID 7 /* 6 valid machdep IDs */
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ "console_device", CTLTYPE_STRUCT }, \
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{ "root_device", CTLTYPE_STRING }, \
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{ "unaligned_print", CTLTYPE_INT }, \
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{ "unaligned_fix", CTLTYPE_INT }, \
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{ "unaligned_sigbus", CTLTYPE_INT }, \
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{ "booted_kernel", CTLTYPE_STRING }, \
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}
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#ifdef _KERNEL
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struct pcb;
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struct proc;
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struct reg;
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struct rpb;
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struct trapframe;
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int badaddr(void *, size_t);
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#endif /* _KERNEL */
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#endif /* _ALPHA_CPU_H_ */
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