154 lines
4.8 KiB
C
154 lines
4.8 KiB
C
/* $NetBSD: dhureg.h,v 1.4 1999/05/28 20:17:29 ragge Exp $ */
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/*
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* Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifdef notdef
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union w_b
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{
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u_short word;
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struct {
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u_char byte_lo;
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u_char byte_hi;
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} bytes;
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};
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struct DHUregs
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{
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volatile union w_b u_csr; /* Control/Status Register (R/W) */
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volatile u_short dhu_rbuf; /* Receive Buffer (R only) */
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#define dhu_txchar dhu_rbuf /* Transmit Character (W only) */
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volatile u_short dhu_lpr; /* Line Parameter Register (R/W) */
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volatile u_short dhu_stat; /* Line Status (R only) */
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volatile u_short dhu_lnctrl; /* Line Control (R/W) */
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volatile u_short dhu_tbufad1; /* Transmit Buffer Address 1 (R/W) */
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volatile u_short dhu_tbufad2; /* Transmit Buffer Address 2 (R/W) */
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volatile u_short dhu_tbufcnt; /* Transmit Buffer Count (R/W) */
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};
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#define dhu_csr u_csr.word
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#define dhu_csr_lo u_csr.bytes.byte_lo
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#define dhu_csr_hi u_csr.bytes.byte_hi
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typedef struct DHUregs dhuregs;
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#endif
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#define DHU_UBA_CSR 0
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#define DHU_UBA_CSR_HI 1
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#define DHU_UBA_RBUF 2
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#define DHU_UBA_TXCHAR 2
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#define DHU_UBA_LPR 4
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#define DHU_UBA_STAT 6
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#define DHU_UBA_LNCTRL 8
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#define DHU_UBA_TBUFAD1 10
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#define DHU_UBA_TBUFAD2 12
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#define DHU_UBA_TBUFCNT 14
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/* CSR bits */
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#define DHU_CSR_TX_ACTION 0100000
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#define DHU_CSR_TXIE 0040000
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#define DHU_CSR_DIAG_FAIL 0020000
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#define DHU_CSR_TX_DMA_ERROR 0010000
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#define DHU_CSR_TX_LINE_MASK 0007400
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#define DHU_CSR_RX_DATA_AVAIL 0000200
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#define DHU_CSR_RXIE 0000100
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#define DHU_CSR_MASTER_RESET 0000040
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#define DHU_CSR_UNUSED 0000020
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#define DHU_CSR_CHANNEL_MASK 0000017
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/* RBUF bits */
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#define DHU_RBUF_DATA_VALID 0100000
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#define DHU_RBUF_OVERRUN_ERR 0040000
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#define DHU_RBUF_FRAMING_ERR 0020000
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#define DHU_RBUF_PARITY_ERR 0010000
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#define DHU_RBUF_RX_LINE_MASK 0007400
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#define DHU_DIAG_CODE 0070001
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#define DHU_MODEM_CODE 0070000
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/* TXCHAR bits */
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#define DHU_TXCHAR_DATA_VALID 0100000
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/* LPR bits */
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#define DHU_LPR_B50 0x0
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#define DHU_LPR_B75 0x1
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#define DHU_LPR_B110 0x2
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#define DHU_LPR_B134 0x3
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#define DHU_LPR_B150 0x4
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#define DHU_LPR_B300 0x5
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#define DHU_LPR_B600 0x6
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#define DHU_LPR_B1200 0x7
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#define DHU_LPR_B1800 0x8
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#define DHU_LPR_B2000 0x9
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#define DHU_LPR_B2400 0xA
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#define DHU_LPR_B4800 0xB
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#define DHU_LPR_B7200 0xC
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#define DHU_LPR_B9600 0xD
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#define DHU_LPR_B19200 0xE
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#define DHU_LPR_B38400 0xF
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#define DHU_LPR_5_BIT_CHAR 0000000
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#define DHU_LPR_6_BIT_CHAR 0000010
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#define DHU_LPR_7_BIT_CHAR 0000020
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#define DHU_LPR_8_BIT_CHAR 0000030
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#define DHU_LPR_PARENB 0000040
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#define DHU_LPR_EPAR 0000100
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#define DHU_LPR_2_STOP 0000200
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/* STAT bits */
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#define DHU_STAT_DSR 0100000
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#define DHU_STAT_RI 0020000
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#define DHU_STAT_DCD 0010000
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#define DHU_STAT_CTS 0004000
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#define DHU_STAT_DHU 0000400
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/* LNCTRL bits */
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#define DHU_LNCTRL_DMA_ABORT 0000001
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#define DHU_LNCTRL_IAUTO 0000002
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#define DHU_LNCTRL_RX_ENABLE 0000004
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#define DHU_LNCTRL_BREAK 0000010
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#define DHU_LNCTRL_OAUTO 0000020
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#define DHU_LNCTRL_FORCE_XOFF 0000040
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#define DHU_LNCTRL_LINK_TYPE 0000400
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#define DHU_LNCTRL_DTR 0001000
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#define DHU_LNCTRL_RTS 0010000
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/* TBUFAD2 bits */
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#define DHU_TBUFAD2_DMA_START 0000200
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#define DHU_TBUFAD2_TX_ENABLE 0100000
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