2652188cc4
interface controllers (of varying intelligence levels). Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford, with some modification by me.
502 lines
12 KiB
C
502 lines
12 KiB
C
/* $NetBSD: pcf8583.c,v 1.1 2003/09/30 00:35:31 thorpej Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the Philips PCF8583 Real Time Clock.
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*
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* This driver is partially derived from Ben Harris's PCF8583 driver
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* for NetBSD/acorn26.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/event.h>
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#include <dev/clock_subr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/pcf8583reg.h>
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#include <dev/i2c/pcf8583var.h>
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struct pcfrtc_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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int sc_open;
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struct todr_chip_handle sc_todr;
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};
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static int pcfrtc_match(struct device *, struct cfdata *, void *);
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static void pcfrtc_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(pcfrtc, sizeof(struct pcfrtc_softc),
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pcfrtc_match, pcfrtc_attach, NULL, NULL);
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extern struct cfdriver pcfrtc_cd;
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dev_type_open(pcfrtc_open);
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dev_type_close(pcfrtc_close);
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dev_type_read(pcfrtc_read);
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dev_type_write(pcfrtc_write);
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const struct cdevsw pcfrtc_cdevsw = {
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pcfrtc_open, pcfrtc_close, pcfrtc_read, pcfrtc_write, noioctl,
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nostop, notty, nopoll, nommap, nokqfilter
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};
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static int pcfrtc_clock_read(struct pcfrtc_softc *, struct clock_ymdhms *,
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uint8_t *);
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static int pcfrtc_clock_write(struct pcfrtc_softc *, struct clock_ymdhms *,
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uint8_t);
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static int pcfrtc_gettime(struct todr_chip_handle *, struct timeval *);
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static int pcfrtc_settime(struct todr_chip_handle *, struct timeval *);
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static int pcfrtc_getcal(struct todr_chip_handle *, int *);
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static int pcfrtc_setcal(struct todr_chip_handle *, int);
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int
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pcfrtc_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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if ((ia->ia_addr & PCF8583_ADDRMASK) == PCF8583_ADDR)
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return (1);
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return (0);
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}
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void
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pcfrtc_attach(struct device *parent, struct device *self, void *aux)
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{
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struct pcfrtc_softc *sc = (struct pcfrtc_softc *)self;
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struct i2c_attach_args *ia = aux;
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uint8_t cmdbuf[1], csr;
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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aprint_naive(": Real-time Clock/NVRAM\n");
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aprint_normal(": PCF8583 Real-time Clock/NVRAM\n");
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cmdbuf[0] = PCF8583_REG_CSR;
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &csr, 1, 0) != 0) {
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aprint_error("%s: unable to read CSR\n", sc->sc_dev.dv_xname);
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return;
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}
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aprint_normal("%s: ", sc->sc_dev.dv_xname);
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switch (csr & PCF8583_CSR_FN_MASK) {
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case PCF8583_CSR_FN_32768HZ:
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aprint_normal(" 32.768 kHz clock");
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break;
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case PCF8583_CSR_FN_50HZ:
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aprint_normal(" 50 Hz clock");
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break;
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case PCF8583_CSR_FN_EVENT:
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aprint_normal(" event counter");
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break;
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case PCF8583_CSR_FN_TEST:
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aprint_normal(" test mode");
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break;
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}
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if (csr & PCF8583_CSR_STOP)
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aprint_normal(", stopped");
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if (csr & PCF8583_CSR_ALARMENABLE)
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aprint_normal(", alarm enabled");
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aprint_normal("\n");
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sc->sc_open = 0;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = pcfrtc_gettime;
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sc->sc_todr.todr_settime = pcfrtc_settime;
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sc->sc_todr.todr_getcal = pcfrtc_getcal;
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sc->sc_todr.todr_setcal = pcfrtc_setcal;
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sc->sc_todr.todr_setwen = NULL;
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todr_attach(&sc->sc_todr);
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}
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/*ARGSUSED*/
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int
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pcfrtc_open(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct pcfrtc_softc *sc;
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if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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/* XXX: Locking */
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if (sc->sc_open)
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return (EBUSY);
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sc->sc_open = 1;
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return (0);
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}
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/*ARGSUSED*/
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int
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pcfrtc_close(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct pcfrtc_softc *sc;
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if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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sc->sc_open = 0;
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return (0);
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}
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/*ARGSUSED*/
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int
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pcfrtc_read(dev_t dev, struct uio *uio, int flags)
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{
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struct pcfrtc_softc *sc;
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u_int8_t ch, cmdbuf[1];
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int a, error;
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if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= PCF8583_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a + PCF8583_NVRAM_START;
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if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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printf("%s: pcfrtc_read: read failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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return (error);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (0);
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}
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/*ARGSUSED*/
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int
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pcfrtc_write(dev_t dev, struct uio *uio, int flags)
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{
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struct pcfrtc_softc *sc;
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u_int8_t cmdbuf[2];
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int a, error;
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if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= PCF8583_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a + PCF8583_NVRAM_START;
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if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
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break;
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if ((error = iic_exec(sc->sc_tag,
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uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
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printf("%s: pcfrtc_write: write failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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static int
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pcfrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct pcfrtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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uint8_t centi;
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if (pcfrtc_clock_read(sc, &dt, ¢i) == 0)
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return (-1);
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tv->tv_sec = clock_ymdhms_to_secs(&dt);
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tv->tv_usec = centi * 10000;
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return (0);
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}
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static int
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pcfrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct pcfrtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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clock_secs_to_ymdhms(tv->tv_sec, &dt);
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if (pcfrtc_clock_write(sc, &dt, tv->tv_usec / 10000) == 0)
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return (-1);
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return (0);
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}
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static int
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pcfrtc_setcal(struct todr_chip_handle *ch, int cal)
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{
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return (EOPNOTSUPP);
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}
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static int
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pcfrtc_getcal(struct todr_chip_handle *ch, int *cal)
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{
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return (EOPNOTSUPP);
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}
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static const int pcf8583_rtc_offset[] = {
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PCF8583_REG_CSR,
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PCF8583_REG_CENTI,
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PCF8583_REG_SEC,
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PCF8583_REG_MIN,
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PCF8583_REG_HOUR,
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PCF8583_REG_YEARDATE,
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PCF8583_REG_WKDYMON,
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PCF8583_REG_TIMER,
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0xc0, /* NVRAM -- year stored here */
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0xc1, /* NVRAM -- century stored here */
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};
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static int
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pcfrtc_clock_read(struct pcfrtc_softc *sc, struct clock_ymdhms *dt,
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uint8_t *centi)
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{
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u_int8_t bcd[10], cmdbuf[1];
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int i;
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: pcfrtc_clock_read: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Read each timekeeping register in order. */
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for (i = 0; i < 10; i++) {
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cmdbuf[0] = pcf8583_rtc_offset[i];
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: pcfrtc_clock_read: failed to read rtc "
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"at 0x%x\n", sc->sc_dev.dv_xname,
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pcf8583_rtc_offset[i]);
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return (0);
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}
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}
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/* Done with I2C */
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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/*
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* Convert the PCF8583's register values into something useable
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*/
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*centi = FROMBCD(bcd[PCF8583_REG_CENTI]);
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dt->dt_sec = FROMBCD(bcd[PCF8583_REG_SEC]);
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dt->dt_min = FROMBCD(bcd[PCF8583_REG_MIN]);
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dt->dt_hour = FROMBCD(bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_MASK);
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if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_12H) {
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dt->dt_hour %= 12; /* 12AM -> 0, 12PM -> 12 */
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if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_PM)
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dt->dt_hour += 12;
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}
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dt->dt_day = FROMBCD(bcd[PCF8583_REG_YEARDATE] & PCF8583_DATE_MASK);
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dt->dt_mon = FROMBCD(bcd[PCF8583_REG_WKDYMON] & PCF8583_MON_MASK);
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dt->dt_year = bcd[8] + (bcd[9] * 100);
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/* Try to notice if the year's rolled over. */
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if (bcd[PCF8583_REG_CSR] & PCF8583_CSR_MASK)
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printf("%s: cannot check year in mask mode\n",
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sc->sc_dev.dv_xname);
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else {
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while (dt->dt_year % 4 !=
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(bcd[PCF8583_REG_YEARDATE] &
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PCF8583_YEAR_MASK) >> PCF8583_YEAR_SHIFT)
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dt->dt_year++;
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}
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return (1);
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}
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static int
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pcfrtc_clock_write(struct pcfrtc_softc *sc, struct clock_ymdhms *dt,
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uint8_t centi)
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{
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uint8_t bcd[10], cmdbuf[2];
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int i;
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/*
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* Convert our time representation into something the PCF8583
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* can understand.
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*/
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bcd[PCF8583_REG_CENTI] = centi;
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bcd[PCF8583_REG_SEC] = TOBCD(dt->dt_sec);
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bcd[PCF8583_REG_MIN] = TOBCD(dt->dt_min);
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bcd[PCF8583_REG_HOUR] = TOBCD(dt->dt_hour) & PCF8583_HOUR_MASK;
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bcd[PCF8583_REG_YEARDATE] = TOBCD(dt->dt_day) |
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((dt->dt_year % 4) << PCF8583_YEAR_SHIFT);
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bcd[PCF8583_REG_WKDYMON] = TOBCD(dt->dt_mon) |
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((dt->dt_wday % 4) << PCF8583_WKDY_SHIFT);
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bcd[8] = dt->dt_year % 100;
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bcd[9] = dt->dt_year / 100;
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: pcfrtc_clock_write: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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for (i = 1; i < 10; i++) {
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cmdbuf[0] = pcf8583_rtc_offset[i];
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if (iic_exec(sc->sc_tag,
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i != 9 ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: pcfrtc_clock_write: failed to write rtc "
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" at 0x%x\n", sc->sc_dev.dv_xname,
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pcf8583_rtc_offset[i]);
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return (0);
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}
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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return (1);
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}
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int
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pcfrtc_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset,
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u_int8_t *rvp, size_t len)
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{
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u_int8_t cmdbuf[1];
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/*
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* NOTE: "offset" is an absolute offset into the PCF8583
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* address space, not relative to the NVRAM.
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*/
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if (len == 0)
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return (0);
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if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
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return (-1);
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while (len) {
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/* Read a single byte. */
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cmdbuf[0] = offset;
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if (iic_exec(tag, I2C_OP_READ_WITH_STOP, i2caddr,
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cmdbuf, 1, rvp, 1, I2C_F_POLL)) {
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iic_release_bus(tag, I2C_F_POLL);
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return (-1);
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}
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len--;
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rvp++;
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offset++;
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}
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iic_release_bus(tag, I2C_F_POLL);
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return (0);
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}
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int
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pcfrtc_bootstrap_write(i2c_tag_t tag, int i2caddr, int offset,
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u_int8_t *rvp, size_t len)
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{
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u_int8_t cmdbuf[1];
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/*
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* NOTE: "offset" is an absolute offset into the PCF8583
|
|
* address space, not relative to the NVRAM.
|
|
*/
|
|
|
|
if (len == 0)
|
|
return (0);
|
|
|
|
if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
|
|
return (-1);
|
|
|
|
while (len) {
|
|
/* Write a single byte. */
|
|
cmdbuf[0] = offset;
|
|
if (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, i2caddr,
|
|
cmdbuf, 1, rvp, 1, I2C_F_POLL)) {
|
|
iic_release_bus(tag, I2C_F_POLL);
|
|
return (-1);
|
|
}
|
|
|
|
len--;
|
|
rvp++;
|
|
offset++;
|
|
}
|
|
|
|
iic_release_bus(tag, I2C_F_POLL);
|
|
return (0);
|
|
}
|