f0002ba642
for the i82596 PORT access interface, from the documentation for that chip. These help clarify writes to the SYSBUS part of the SCP, and PORT usage by i82596-aware drivers.
465 lines
18 KiB
C
465 lines
18 KiB
C
/* $NetBSD: i82586reg.h,v 1.9 2001/11/26 23:31:00 fredette Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1992, University of Vermont and State Agricultural College.
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* Copyright (c) 1992, Garrett A. Wollman.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* Vermont and State Agricultural College and Garrett A. Wollman.
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* 4. Neither the name of the University nor the name of the author
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Intel 82586 Ethernet chip
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* Register, bit, and structure definitions.
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*
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* Written by GAW with reference to the Clarkson Packet Driver code for this
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* chip written by Russ Nelson and others.
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*/
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/*
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* NOTE, the structure definitions in here are for reference only.
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* We use integer offsets exclusively to access the i82586 data structures.
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*/
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/*
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* The i82596 has a hardware port that can be used to command the
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* chip to perform special functions. For all but IE_PORT_RESET,
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* a 16-byte aligned memory address is ORed into the port command.
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*/
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#define IE_PORT_RESET 0x00 /* software reset */
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#define IE_PORT_SELF_TEST 0x01 /* self-test */
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#define IE_PORT_ALT_SCP 0x02 /* set alternate SCP address */
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#define IE_PORT_DUMP 0x03 /* dump state */
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/*
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* This is the master configuration block.
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* It tells the hardware where all the rest of the stuff is.
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*-
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struct __ie_sys_conf_ptr {
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u_int16_t mbz; // must be zero
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u_int8_t ie_bus_use; // true if 8-bit only
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u_int8_t mbz2[5]; // must be zero
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u_int32_t ie_iscp_ptr; // 24-bit physaddr of ISCP
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};
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*/
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#define IE_SCP_SZ 12
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#define IE_SCP_BUS_USE(base) ((base) + 2)
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#define IE_SCP_ISCP(base) ((base) + 8)
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/*
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* SYSBUS byte flags. Most are specific to the i82596, and so
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* far we always run an i82596 in i82586-compatible mode.
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*/
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#define IE_SYSBUS_16BIT (0x0 << 0)
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#define IE_SYSBUS_8BIT (0x1 << 0)
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#define IE_SYSBUS_596_82586 (0x0 << 1)
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#define IE_SYSBUS_596_32SEG (0x1 << 1)
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#define IE_SYSBUS_596_LINEAR (0x2 << 1)
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#define IE_SYSBUS_596_TRGINT (0x0 << 3)
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#define IE_SYSBUS_596_TRGEXT (0x1 << 3)
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#define IE_SYSBUS_596_NOLOCK (0x0 << 4)
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#define IE_SYSBUS_596_LOCK (0x1 << 4)
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#define IE_SYSBUS_596_INTHIGH (0x0 << 4)
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#define IE_SYSBUS_596_INTLOW (0x1 << 5)
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#define IE_SYSBUS_596_RSVD_SET (0x1 << 6)
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#define IE_SYSBUS_596_LE (0x0 << 7)
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#define IE_SYSBUS_596_BE (0x1 << 7)
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/*
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* Note that this is wired in hardware; the SCP is always located here, no
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* matter what.
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*/
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#define IE_SCP_ADDR 0xfffff4
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/*
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* The tells the hardware where all the rest of the stuff is, too.
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* FIXME: some of these should be re-commented after we figure out their
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* REAL function.
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*-
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struct __ie_int_sys_conf_ptr {
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u_int8_t ie_busy; // zeroed after init
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u_int8_t mbz;
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u_int16_t ie_scb_offset; // 16-bit physaddr of next struct
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caddr_t ie_base; // 24-bit physaddr for all 16-bit vars
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};
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*/
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#define IE_ISCP_SZ 8
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#define IE_ISCP_BUSY(base) ((base) + 0)
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#define IE_ISCP_SCB(base) ((base) + 2)
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#define IE_ISCP_BASE(base) ((base) + 4)
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/*
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* This FINALLY tells the hardware what to do and where to put it.
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*-
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struct __ie_sys_ctl_block {
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u_int16_t ie_status; // status word
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u_int16_t ie_command; // command word
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u_int16_t ie_command_list; // 16-pointer to command block list
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u_int16_t ie_recv_list; // 16-pointer to receive frame list
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u_int16_t ie_err_crc; // CRC errors
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u_int16_t ie_err_align; // Alignment errors
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u_int16_t ie_err_resource; // Resource errors
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u_int16_t ie_err_overrun; // Overrun errors
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};
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*/
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#define IE_SCB_SZ 16
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#define IE_SCB_STATUS(base) ((base) + 0)
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#define IE_SCB_CMD(base) ((base) + 2)
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#define IE_SCB_CMDLST(base) ((base) + 4)
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#define IE_SCB_RCVLST(base) ((base) + 6)
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#define IE_SCB_ERRCRC(base) ((base) + 8)
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#define IE_SCB_ERRALN(base) ((base) + 10)
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#define IE_SCB_ERRRES(base) ((base) + 12)
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#define IE_SCB_ERROVR(base) ((base) + 14)
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/* Command values */
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#define IE_RUC_MASK 0x0070 /* mask for RU command */
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#define IE_RUC_NOP 0 /* for completeness */
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#define IE_RUC_START 0x0010 /* start receive unit command */
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#define IE_RUC_RESUME 0x0020 /* resume a suspended receiver command */
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#define IE_RUC_SUSPEND 0x0030 /* suspend receiver command */
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#define IE_RUC_ABORT 0x0040 /* abort current receive operation */
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#define IE_CUC_MASK 0x0700 /* mask for CU command */
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#define IE_CUC_NOP 0 /* included for completeness */
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#define IE_CUC_START 0x0100 /* do-command command */
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#define IE_CUC_RESUME 0x0200 /* resume a suspended cmd list */
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#define IE_CUC_SUSPEND 0x0300 /* suspend current command */
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#define IE_CUC_ABORT 0x0400 /* abort current command */
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#define IE_ACK_COMMAND 0xf000 /* mask for ACK command */
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#define IE_ACK_CX 0x8000 /* ack IE_ST_CX */
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#define IE_ACK_FR 0x4000 /* ack IE_ST_FR */
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#define IE_ACK_CNA 0x2000 /* ack IE_ST_CNA */
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#define IE_ACK_RNR 0x1000 /* ack IE_ST_RNR */
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#define IE_ACTION_COMMAND(x) (((x) & IE_CUC_MASK) == IE_CUC_START)
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/* is this command an action command? */
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/* Status values */
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#define IE_ST_WHENCE 0xf000 /* mask for cause of interrupt */
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#define IE_ST_CX 0x8000 /* command with I bit completed */
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#define IE_ST_FR 0x4000 /* frame received */
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#define IE_ST_CNA 0x2000 /* all commands completed */
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#define IE_ST_RNR 0x1000 /* receive not ready */
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#define IE_CUS_MASK 0x0700 /* mask for command unit status */
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#define IE_CUS_ACTIVE 0x0200 /* command unit is active */
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#define IE_CUS_SUSPEND 0x0100 /* command unit is suspended */
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#define IE_RUS_MASK 0x0070 /* mask for receiver unit status */
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#define IE_RUS_SUSPEND 0x0010 /* receiver is suspended */
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#define IE_RUS_NOSPACE 0x0020 /* receiver has no resources */
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#define IE_RUS_READY 0x0040 /* receiver is ready */
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/*
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* This is filled in partially by the chip, partially by us.
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*-
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struct __ie_recv_frame_desc {
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u_int16_t ie_fd_status; // status for this frame
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u_int16_t ie_fd_last; // end of frame list flag
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u_int16_t ie_fd_next; // 16-pointer to next RFD
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u_int16_t ie_fd_buf_desc; // 16-pointer to list of buffer descs
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struct __ie_en_addr dest; // destination ether
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struct __ie_en_addr src; // source ether
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u_int16_t ie_length; // 802 length/Ether type
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u_short mbz; // must be zero
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};
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*/
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#define IE_RFRAME_SZ 24
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#define IE_RFRAME_ADDR(base,i) ((base) + (i) * IE_RFRAME_SZ)
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#define IE_RFRAME_STATUS(b,i) (IE_RFRAME_ADDR(b,i) + 0)
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#define IE_RFRAME_LAST(b,i) (IE_RFRAME_ADDR(b,i) + 2)
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#define IE_RFRAME_NEXT(b,i) (IE_RFRAME_ADDR(b,i) + 4)
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#define IE_RFRAME_BUFDESC(b,i) (IE_RFRAME_ADDR(b,i) + 6)
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#define IE_RFRAME_EDST(b,i) (IE_RFRAME_ADDR(b,i) + 8)
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#define IE_RFRAME_ESRC(b,i) (IE_RFRAME_ADDR(b,i) + 14)
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#define IE_RFRAME_ELEN(b,i) (IE_RFRAME_ADDR(b,i) + 20)
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/* "last" bits */
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#define IE_FD_EOL 0x8000 /* last rfd in list */
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#define IE_FD_SUSP 0x4000 /* suspend RU after receipt */
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/* status field bits */
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#define IE_FD_COMPLETE 0x8000 /* frame is complete */
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#define IE_FD_BUSY 0x4000 /* frame is busy */
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#define IE_FD_OK 0x2000 /* frame is ok */
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#define IE_FD_CRC 0x0800 /* CRC error */
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#define IE_FD_ALGN 0x0400 /* Alignment error */
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#define IE_FD_RNR 0x0200 /* receiver out of resources here */
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#define IE_FD_OVR 0x0100 /* DMA overrun */
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#define IE_FD_SHORT 0x0080 /* Short frame */
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#define IE_FD_NOEOF 0x0040 /* no EOF (?) */
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#define IE_FD_ERRMASK /* all error bits */ \
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(IE_FD_CRC|IE_FD_ALGN|IE_FD_RNR|IE_FD_OVR|IE_FD_SHORT|IE_FD_NOEOF)
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#define IE_FD_STATUSBITS \
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"\20\20COMPLT\17BUSY\16OK\14CRC\13ALGN\12RNR\11OVR\10SHORT\7NOEOF"
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/*
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* linked list of buffers...
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*-
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struct __ie_recv_buf_desc {
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u_int16_t ie_rbd_status; // status for this buffer
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u_int16_t ie_rbd_next; // 16-pointer to next RBD
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caddr_t ie_rbd_buffer; // 24-pointer to buffer for this RBD
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u_int16_t ie_rbd_length; // length of the buffer
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u_int16_t mbz; // must be zero
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};
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*/
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#define IE_RBD_SZ 12
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#define IE_RBD_ADDR(base,i) ((base) + (i) * IE_RBD_SZ)
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#define IE_RBD_STATUS(b,i) (IE_RBD_ADDR(b,i) + 0)
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#define IE_RBD_NEXT(b,i) (IE_RBD_ADDR(b,i) + 2)
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#define IE_RBD_BUFADDR(b,i) (IE_RBD_ADDR(b,i) + 4)
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#define IE_RBD_BUFLEN(b,i) (IE_RBD_ADDR(b,i) + 8)
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/* RBD status fields */
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#define IE_RBD_LAST 0x8000 /* last buffer */
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#define IE_RBD_USED 0x4000 /* this buffer has data */
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#define IE_RBD_CNTMASK 0x3fff /* byte count of buffer data */
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/* RDB `End Of List' flag; encoded in `buffer length' field */
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#define IE_RBD_EOL 0x8000 /* last buffer */
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/*
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* All commands share this in common.
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*-
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struct __ie_cmd_common {
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u_int16_t ie_cmd_status; // status of this command
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u_int16_t ie_cmd_cmd; // command word
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u_int16_t ie_cmd_link; // link to next command
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};
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*/
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#define IE_CMD_COMMON_SZ 6
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#define IE_CMD_COMMON_STATUS(base) ((base) + 0)
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#define IE_CMD_COMMON_CMD(base) ((base) + 2)
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#define IE_CMD_COMMON_LINK(base) ((base) + 4)
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#define IE_STAT_COMPL 0x8000 /* command is completed */
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#define IE_STAT_BUSY 0x4000 /* command is running now */
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#define IE_STAT_OK 0x2000 /* command completed successfully */
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#define IE_STAT_ABORT 0x1000 /* command was aborted */
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#define IE_CMD_NOP 0x0000 /* NOP */
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#define IE_CMD_IASETUP 0x0001 /* initial address setup */
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#define IE_CMD_CONFIG 0x0002 /* configure command */
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#define IE_CMD_MCAST 0x0003 /* multicast setup command */
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#define IE_CMD_XMIT 0x0004 /* transmit command */
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#define IE_CMD_TDR 0x0005 /* time-domain reflectometer command */
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#define IE_CMD_DUMP 0x0006 /* dump command */
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#define IE_CMD_DIAGNOSE 0x0007 /* diagnostics command */
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#define IE_CMD_LAST 0x8000 /* this is the last command in the list */
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#define IE_CMD_SUSPEND 0x4000 /* suspend CU after this command */
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#define IE_CMD_INTR 0x2000 /* post an interrupt after completion */
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/*
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* No-op commands; just like COMMON but "indexable"
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*/
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#define IE_CMD_NOP_SZ IE_CMD_COMMON_SZ
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#define IE_CMD_NOP_ADDR(base,i) ((base) + (i) * IE_CMD_NOP_SZ)
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#define IE_CMD_NOP_STATUS(b,i) (IE_CMD_NOP_ADDR(b,i) + 0)
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#define IE_CMD_NOP_CMD(b,i) (IE_CMD_NOP_ADDR(b,i) + 2)
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#define IE_CMD_NOP_LINK(b,i) (IE_CMD_NOP_ADDR(b,i) + 4)
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/*
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* This is the command to transmit a frame.
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*-
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struct __ie_xmit_cmd {
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struct __ie_cmd_common com; // common part
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#define __ie_xmit_status com.ie_cmd_status
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u_int16_t ie_xmit_desc; // pointer to buffer descriptor
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struct __ie_en_addr ie_xmit_addr; // destination address
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u_int16_t ie_xmit_length; // 802.3 length/Ether type field
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};
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*/
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#define IE_CMD_XMIT_SZ (IE_CMD_COMMON_SZ + 10)
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#define IE_CMD_XMIT_ADDR(base,i) ((base) + (i) * IE_CMD_XMIT_SZ)
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#define IE_CMD_XMIT_STATUS(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + 0) /* == CMD_COMMON_STATUS */
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#define IE_CMD_XMIT_CMD(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + 2) /* == CMD_COMMON_CMD */
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#define IE_CMD_XMIT_LINK(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + 4) /* == CMD_COMMON_LINK */
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#define IE_CMD_XMIT_DESC(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 0)
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#define IE_CMD_XMIT_EADDR(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 2)
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#define IE_CMD_XMIT_LEN(b,i) \
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(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 8)
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#define IE_XS_MAXCOLL 0x000f /* number of collisions during transmit */
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#define IE_XS_EXCMAX 0x0020 /* exceeded maximum number of collisions */
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#define IE_XS_SQE 0x0040 /* SQE positive */
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#define IE_XS_DEFERRED 0x0080 /* transmission deferred */
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#define IE_XS_UNDERRUN 0x0100 /* DMA underrun */
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#define IE_XS_LOSTCTS 0x0200 /* Lost CTS */
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#define IE_XS_NOCARRIER 0x0400 /* No Carrier */
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#define IE_XS_LATECOLL 0x0800 /* Late collision */
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/*
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* This is a buffer descriptor for a frame to be transmitted.
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*-
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struct __ie_xmit_buf {
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u_int16_t ie_xmit_flags; // see below
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u_int16_t ie_xmit_next; // 16-pointer to next desc
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caddr_t ie_xmit_buf; // 24-pointer to the actual buffer
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};
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*/
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#define IE_XBD_SZ 8
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#define IE_XBD_ADDR(base,i) ((base) + (i) * IE_XBD_SZ)
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#define IE_XBD_FLAGS(b,i) (IE_XBD_ADDR(b,i) + 0)
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#define IE_XBD_NEXT(b,i) (IE_XBD_ADDR(b,i) + 2)
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#define IE_XBD_BUF(b,i) (IE_XBD_ADDR(b,i) + 4)
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#define IE_TBD_EOL 0x8000 /* this TBD is the last one */
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#define IE_TBD_CNTMASK 0x3fff /* The rest of the `flags' word
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is actually the length. */
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/*
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* Multicast setup command.
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*-
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struct __ie_mcast_cmd {
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struct __ie_cmd_common com; // common part
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#define ie_mcast_status com.ie_cmd_status
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// size (in bytes) of multicast addresses
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u_short ie_mcast_bytes;
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struct __ie_en_addr ie_mcast_addrs[IE_MAXMCAST + 1];// space for them
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};
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*/
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#define IE_CMD_MCAST_SZ (IE_CMD_COMMON_SZ + 2 /* + XXX */)
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#define IE_CMD_MCAST_BYTES(base) ((base) + IE_CMD_COMMON_SZ + 0)
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#define IE_CMD_MCAST_MADDR(base) ((base) + IE_CMD_COMMON_SZ + 2)
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/*
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* Time Domain Reflectometer command.
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*-
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struct __ie_tdr_cmd {
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struct __ie_cmd_common com; // common part
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#define ie_tdr_status com.ie_cmd_status
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u_short ie_tdr_time; // error bits and time
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};
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*/
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#define IE_CMD_TDR_SZ (IE_CMD_COMMON_SZ + 2)
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#define IE_CMD_TDR_TIME(base) ((base) + IE_CMD_COMMON_SZ + 0)
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#define IE_TDR_SUCCESS 0x8000 /* TDR succeeded without error */
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#define IE_TDR_XCVR 0x4000 /* detected a transceiver problem */
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#define IE_TDR_OPEN 0x2000 /* detected an incorrect termination ("open") */
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#define IE_TDR_SHORT 0x1000 /* TDR detected a short circuit */
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#define IE_TDR_TIME 0x07ff /* mask for reflection time */
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/*
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* Initial Address Setup command
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*-
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struct __ie_iasetup_cmd {
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struct __ie_cmd_common com;
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#define ie_iasetup_status com.ie_cmd_status
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struct __ie_en_addr ie_address;
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};
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*/
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#define IE_CMD_IAS_SZ (IE_CMD_COMMON_SZ + 6)
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#define IE_CMD_IAS_EADDR(base) ((base) + IE_CMD_COMMON_SZ + 0)
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|
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/*
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* Configuration command
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*-
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struct __ie_config_cmd {
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struct __ie_cmd_common com; // common part
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#define ie_config_status com.ie_cmd_status
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u_int8_t ie_config_count; // byte count (0x0c)
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u_int8_t ie_fifo; // fifo (8)
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u_int8_t ie_save_bad; // save bad frames (0x40)
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u_int8_t ie_addr_len; // address length (0x2e) (AL-LOC == 1)
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u_int8_t ie_priority; // priority and backoff (0x0)
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u_int8_t ie_ifs; // inter-frame spacing (0x60)
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u_int8_t ie_slot_low; // slot time, LSB (0x0)
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u_int8_t ie_slot_high; // slot time, MSN, and retries (0xf2)
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u_int8_t ie_promisc; // 1 if promiscuous, else 0
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u_int8_t ie_crs_cdt; // CSMA/CD parameters (0x0)
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u_int8_t ie_min_len; // min frame length (0x40)
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u_int8_t ie_junk; // stuff for 82596 (0xff)
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};
|
|
*/
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#define IE_CMD_CFG_SZ (IE_CMD_COMMON_SZ + 12)
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#define IE_CMD_CFG_CNT(base) ((base) + IE_CMD_COMMON_SZ + 0)
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#define IE_CMD_CFG_FIFO(base) ((base) + IE_CMD_COMMON_SZ + 1)
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#define IE_CMD_CFG_SAVEBAD(base) ((base) + IE_CMD_COMMON_SZ + 2)
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#define IE_CMD_CFG_ADDRLEN(base) ((base) + IE_CMD_COMMON_SZ + 3)
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#define IE_CMD_CFG_PRIORITY(base) ((base) + IE_CMD_COMMON_SZ + 4)
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#define IE_CMD_CFG_IFS(base) ((base) + IE_CMD_COMMON_SZ + 5)
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#define IE_CMD_CFG_SLOT_LOW(base) ((base) + IE_CMD_COMMON_SZ + 6)
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|
#define IE_CMD_CFG_SLOT_HIGH(base) ((base) + IE_CMD_COMMON_SZ + 7)
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#define IE_CMD_CFG_PROMISC(base) ((base) + IE_CMD_COMMON_SZ + 8)
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|
#define IE_CMD_CFG_CRSCDT(base) ((base) + IE_CMD_COMMON_SZ + 9)
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|
#define IE_CMD_CFG_MINLEN(base) ((base) + IE_CMD_COMMON_SZ + 10)
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|
#define IE_CMD_CFG_JUNK(base) ((base) + IE_CMD_COMMON_SZ + 11)
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