201 lines
5.5 KiB
C
201 lines
5.5 KiB
C
/* $NetBSD: bandit.c,v 1.2 1998/07/13 19:27:13 tsubai Exp $ */
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/*
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* Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation.
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*
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* OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation.
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*
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* APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/param.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#define PCI_BANDIT 11
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#define PCI_REG_BANDIT_CFG 0x40
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#define PCI_REG_ADDR_MASK 0x48
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#define PCI_REG_MODE_SELECT 0x50
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#define PCI_REG_ARBUS_HOLDOFF 0x58
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#define PCI_MS_BYTESWAP 0x001 /* Enable Big Endian mode. (R/W)*/
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#define PCI_MS_PASSATOMIC 0x002 /* PCI Bus to ARBus Lock are always allowed (R)*/
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#define PCI_MS_NUMBER_MASK 0x00C /* PCI Bus Number (R) */
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#define PCI_MS_IS_SYNC 0x010 /* Is Synchronous (1) or Async (0) ? (R)*/
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#define PCI_MS_VGA_SPACE 0x020 /* Map VGA I/O space (R/W) */
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#define PCI_MS_IO_COHERENT 0x040 /* I/O Coherent (R/W) */
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#define PCI_MS_INT_ENABLE 0x080 /* Allow TEA or PCI Abort INT to pass to Grand Central (R/W) */
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static void bandit_init __P((pci_chipset_tag_t));
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static void scan_pci_devs __P((void));
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static void config_slot __P((int));
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void
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pci_init()
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{
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scan_pci_devs();
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}
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void
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bandit_init(pc)
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pci_chipset_tag_t pc;
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{
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u_int status;
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pcitag_t tag;
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tag = pci_make_tag(pc, 0, PCI_BANDIT, 0);
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if ((pci_conf_read(pc, tag, PCI_ID_REG) & 0xffff) == 0xffff)
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return;
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status = pci_conf_read(pc, tag, PCI_REG_MODE_SELECT);
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if ((status & PCI_MS_IO_COHERENT) == 0) {
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status |= PCI_MS_IO_COHERENT;
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pci_conf_write(pc, tag, PCI_REG_MODE_SELECT, status);
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}
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return;
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}
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void
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scan_pci_devs()
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{
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int node;
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char name[64];
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int n = 0;
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u_int reg[2];
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bzero(pci_bridges, sizeof(pci_bridges));
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node = OF_peer(0);
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node = OF_child(node);
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while (node) {
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if (OF_getprop(node, "name", name, sizeof(name)) <= 0)
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continue;
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if (strcmp(name, "bandit") == 0) {
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int child;
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if (OF_getprop(node, "reg", reg, sizeof(reg)) != 8)
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continue;
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pci_bridges[n].iot = (bus_space_tag_t)reg[0];
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pci_bridges[n].addr = mapiodev(reg[0] + 0x800000, 4);
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pci_bridges[n].data = mapiodev(reg[0] + 0xc00000, 4);
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pci_bridges[n].pc = n;
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bandit_init(n++);
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child = OF_child(node);
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while (child) {
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config_slot(child);
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child = OF_peer(child);
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}
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}
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if (strcmp(name, "pci") == 0) { /* XXX This is not a bandit :) */
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int child;
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if (OF_getprop(node, "reg", reg, sizeof(reg)) != 8)
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continue;
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pci_bridges[n].iot = (bus_space_tag_t)reg[0];
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pci_bridges[n].addr = mapiodev(0xfec00000, 4); /* XXX */
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pci_bridges[n].data = mapiodev(0xfee00000, 4); /* XXX */
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pci_bridges[n].pc = PCI_CHIPSET_MPC106; /* for now */
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}
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node = OF_peer(node);
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}
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}
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void
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config_slot(node)
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int node;
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{
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int dev, irq, intr, csr;
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char slotname[8];
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if (OF_getprop(node, "AAPL,slot-name", slotname, sizeof(slotname)) < 2)
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return;
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slotname[2] = 0;
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/*
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* slot A1 pci0 dev 13 irq 23
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* B1 pci0 dev 14 irq 24
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* C1 pci0 dev 15 irq 25
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* D2 pci1 dev 13 irq 27
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* E2 pci1 dev 14 irq 28
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* F2 pci1 dev 15 irq 29
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*
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* XXX Is this TRUE on all PowerMacs?
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*/
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pc = slotname[1] - '1';
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dev = slotname[0] - 'A' + 13 - pc * 3;
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if (OF_getprop(node, "AAPL,interrupts", &irq, sizeof(irq)) ==
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sizeof(irq)) {
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tag = pci_make_tag(pc, 0, dev, 0);
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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#ifdef BANDIT_DEBUG
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printf(" pc=%d, dev=%d\n", pc, dev);
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printf(" OLD csr=0x%x, intr=0x%x\n", csr, intr);
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#endif
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intr = (intr & 0xffffff00) | (irq & 0xff);
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
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/* XXX */
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csr |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_IO_ENABLE);
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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#ifdef BANDIT_DEBUG
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printf(" NEW csr=0x%x, intr=0x%x\n", csr, intr);
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#endif
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}
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}
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