236 lines
7.1 KiB
C
236 lines
7.1 KiB
C
/* $NetBSD: njs_pci.c,v 1.2 2004/08/26 18:38:19 thorpej Exp $ */
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/*-
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by ITOH Yasufumi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: njs_pci.c,v 1.2 2004/08/26 18:38:19 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/ninjascsi32reg.h>
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#include <dev/ic/ninjascsi32var.h>
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#define NJSC32_PCI_BASEADDR_IO PCI_MAPREG_START
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#define NJSC32_PCI_BASEADDR_MEM (PCI_MAPREG_START + 4)
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struct njsc32_pci_softc {
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struct njsc32_softc sc_njsc32;
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pci_chipset_tag_t sc_pc;
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bus_space_handle_t sc_regmaph;
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bus_size_t sc_regmap_size;
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};
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static int njs_pci_match(struct device *, struct cfdata *, void *);
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static void njs_pci_attach(struct device *, struct device *, void *);
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static int njs_pci_detach(struct device *, int);
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CFATTACH_DECL(njs_pci, sizeof(struct njsc32_pci_softc),
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njs_pci_match, njs_pci_attach, njs_pci_detach, NULL);
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static const struct njsc32_pci_product {
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pci_vendor_id_t p_vendor;
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pci_product_id_t p_product;
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njsc32_model_t p_model;
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int p_clk; /* one of NJSC32_CLK_* */
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} njsc32_pci_products[] = {
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_IODATA,
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NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC,
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NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC2,
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NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_BUFFALO,
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NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
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{ 0, 0,
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NJSC32_MODEL_INVALID, 0 },
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};
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static const struct njsc32_pci_product *
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njs_pci_lookup(const struct pci_attach_args *pa)
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{
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const struct njsc32_pci_product *p;
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for (p = njsc32_pci_products;
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p->p_model != NJSC32_MODEL_INVALID; p++) {
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if (PCI_VENDOR(pa->pa_id) == p->p_vendor &&
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PCI_PRODUCT(pa->pa_id) == p->p_product)
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return p;
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}
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return NULL;
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}
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static int
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njs_pci_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (njs_pci_lookup(pa))
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return 1;
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return 0;
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}
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static void
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njs_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct njsc32_pci_softc *psc = (void *) self;
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struct njsc32_softc *sc = &psc->sc_njsc32;
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const struct njsc32_pci_product *prod;
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pci_intr_handle_t ih;
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pci_chipset_tag_t pc = pa->pa_pc;
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pcireg_t reg;
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const char *str_intr, *str_at;
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aprint_naive(": SCSI controller\n");
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if ((prod = njs_pci_lookup(pa)) == NULL)
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panic("njs_pci_attach");
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aprint_normal(": Workbit NinjaSCSI-32 SCSI adapter\n");
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sc->sc_model = prod->p_model;
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sc->sc_clk = prod->p_clk;
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psc->sc_pc = pc;
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/* enable device and DMA */
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reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
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/*
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* Map registers.
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* Try memory map first, and then try I/O.
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*/
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if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_MEM,
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PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&sc->sc_regt, &psc->sc_regmaph, NULL, &psc->sc_regmap_size) == 0) {
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if (bus_space_subregion(sc->sc_regt, psc->sc_regmaph,
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NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) {
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/* failed -- undo map and try I/O */
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bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
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psc->sc_regmap_size);
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goto try_io;
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}
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#ifdef NJSC32_DEBUG
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printf("%s: memory space mapped\n", sc->sc_dev.dv_xname);
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#endif
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sc->sc_flags = NJSC32_MEM_MAPPED;
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} else {
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try_io:
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if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_IO,
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PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh,
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NULL, &psc->sc_regmap_size) == 0) {
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#ifdef NJSC32_DEBUG
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printf("%s: io space mapped\n", sc->sc_dev.dv_xname);
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#endif
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sc->sc_flags = NJSC32_IO_MAPPED;
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} else {
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aprint_error("%s: unable to map device registers\n",
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sc->sc_dev.dv_xname);
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return;
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}
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}
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sc->sc_dmat = pa->pa_dmat;
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/* map interrupt */
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if (pci_intr_map(pa, &ih)) {
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aprint_error("%s: couldn't map interrupt\n",
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sc->sc_dev.dv_xname);
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return;
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}
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str_intr = pci_intr_string(pa->pa_pc, ih);
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str_at = " at ";
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if (str_intr == NULL)
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str_at = str_intr = "";
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/* setup interrupt handler */
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if ((sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, njsc32_intr, sc))
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== NULL) {
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printf("%s: unable to establish interrupt%s%s\n",
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sc->sc_dev.dv_xname, str_at, str_intr);
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return;
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}
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printf("%s: interrupting%s%s\n",
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sc->sc_dev.dv_xname, str_at, str_intr);
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/* attach */
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njsc32_attach(sc);
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}
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static int
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njs_pci_detach(struct device *self, int flags)
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{
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struct njsc32_pci_softc *psc = (void *) self;
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struct njsc32_softc *sc = &psc->sc_njsc32;
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int rv;
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rv = njsc32_detach(sc, flags);
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if (rv)
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return rv;
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if (sc->sc_ih)
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pci_intr_disestablish(psc->sc_pc, sc->sc_ih);
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if (sc->sc_flags & NJSC32_IO_MAPPED)
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bus_space_unmap(sc->sc_regt, sc->sc_regh, psc->sc_regmap_size);
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if (sc->sc_flags & NJSC32_MEM_MAPPED)
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bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
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psc->sc_regmap_size);
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return 0;
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}
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