150 lines
5.5 KiB
C
150 lines
5.5 KiB
C
/* $NetBSD: pte.h,v 1.26 1999/04/09 00:38:11 thorpej Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _ALPHA_PTE_H_
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#define _ALPHA_PTE_H_
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/*
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* Alpha page table entry.
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* Things which are in the VMS PALcode but not in the OSF PALcode
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* are marked with "(VMS)".
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*
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* This information derived from pp. (II) 3-3 - (II) 3-6 and
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* (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
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* Richard L. Sites.
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*/
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/*
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* Alpha Page Table Entry
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*/
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#include <machine/alpha_cpu.h>
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typedef alpha_pt_entry_t pt_entry_t;
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#define PT_ENTRY_NULL ((pt_entry_t *) 0)
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#define PTESHIFT 3 /* pte size == 1 << PTESHIFT */
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#define PG_V ALPHA_PTE_VALID
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#define PG_NV 0
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#define PG_FOR ALPHA_PTE_FAULT_ON_READ
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#define PG_FOW ALPHA_PTE_FAULT_ON_WRITE
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#define PG_FOE ALPHA_PTE_FAULT_ON_EXECUTE
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#define PG_ASM ALPHA_PTE_ASM
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#define PG_GH ALPHA_PTE_GRANULARITY
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#define PG_KRE ALPHA_PTE_KR
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#define PG_URE ALPHA_PTE_UR
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#define PG_KWE ALPHA_PTE_KW
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#define PG_UWE ALPHA_PTE_UW
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#define PG_PROT ALPHA_PTE_PROT
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#define PG_RSVD 0x000000000000cc80 /* Reserved for hardware */
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#define PG_WIRED 0x0000000000010000 /* Wired. [SOFTWARE] */
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#define PG_PVLIST 0x0000000000020000 /* on pv list [SOFTWARE] */
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#define PG_EXEC 0x0000000000040000 /* execute perms [SOFTWARE] */
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#define PG_FRAME ALPHA_PTE_RAME
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#define PG_SHIFT 32
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#define PG_PFNUM(x) ALPHA_PTE_TO_PFN(x)
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/*
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* These are the PALcode PTE bits that we care about when checking to see
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* if a PTE has changed in such a way as to require a TBI.
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*/
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#define PG_PALCODE(x) ((x) & ALPHA_PTE_PALCODE)
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#if defined(_KERNEL) || defined(__KVM_ALPHA_PRIVATE)
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#define NPTEPG_SHIFT (PAGE_SHIFT - PTESHIFT)
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#define NPTEPG (1L << NPTEPG_SHIFT)
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#define PTEMASK (NPTEPG - 1)
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#define l3pte_index(va) \
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(((vaddr_t)(va) >> PAGE_SHIFT) & PTEMASK)
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#define l2pte_index(va) \
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(((vaddr_t)(va) >> (PAGE_SHIFT + NPTEPG_SHIFT)) & PTEMASK)
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#define l1pte_index(va) \
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(((vaddr_t)(va) >> (PAGE_SHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK)
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#define VPT_INDEX(va) \
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(((vaddr_t)(va) >> PAGE_SHIFT) & ((1 << 3 * NPTEPG_SHIFT) - 1))
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/* Space mapped by one level 1 PTE */
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#define ALPHA_L1SEG_SIZE (1L << ((2 * NPTEPG_SHIFT) + PAGE_SHIFT))
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/* Space mapped by one level 2 PTE */
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#define ALPHA_L2SEG_SIZE (1L << (NPTEPG_SHIFT + PAGE_SHIFT))
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#define alpha_trunc_l1seg(x) (((u_long)(x)) & ~(ALPHA_L1SEG_SIZE-1))
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#define alpha_trunc_l2seg(x) (((u_long)(x)) & ~(ALPHA_L2SEG_SIZE-1))
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#endif /* _KERNEL || __KVM_ALPHA_PRIVATE */
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#ifdef _KERNEL
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extern pt_entry_t *kernel_lev1map; /* kernel level 1 page table */
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#endif /* _KERNEL */
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#endif /* ! _ALPHA_PTE_H_ */
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