166 lines
4.1 KiB
C
166 lines
4.1 KiB
C
/* $NetBSD: cacheops_machdep.h,v 1.2 2002/11/03 01:34:41 chs Exp $ */
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/*
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* Copyright (c) 1994, 1995 Gordon W. Ross
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1980, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _HP300_CACHEOPS_MACHDEP_H_
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#define _HP300_CACHEOPS_MACHDEP_H_
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extern vaddr_t MMUbase;
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static __inline int __attribute__((__unused__))
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DCIA_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUCMD);
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if (ectype != EC_VIRT) {
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return 0;
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}
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*ip &= ~MMU_CEN;
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*ip |= MMU_CEN;
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return 1;
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}
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static __inline int __attribute__((__unused__))
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DCIS_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUSSTP);
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if (ectype != EC_VIRT) {
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return 0;
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}
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*ip = *ip;
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return 1;
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}
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static __inline int __attribute__((__unused__))
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DCIU_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUUSTP);
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if (ectype != EC_VIRT) {
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return 0;
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}
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*ip = *ip;
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return 1;
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}
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static __inline int __attribute__((__unused__))
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PCIA_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUCMD);
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if (ectype != EC_PHYS || cputype != CPU_68030) {
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return 0;
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}
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*ip &= ~MMU_CEN;
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*ip |= MMU_CEN;
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/*
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* only some '030 models (345/370/375/400) have external PAC,
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* so we need to do the standard flushing as well.
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*/
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return 0;
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}
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static __inline int __attribute__((__unused__))
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TBIA_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
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if (mmutype != MMU_HP) {
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return 0;
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}
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(void) *ip;
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return 1;
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}
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static __inline int __attribute__((__unused__))
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TBIS_md(vaddr_t va)
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{
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vaddr_t r_va __asm("%a0") = va;
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int s;
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if (mmutype != MMU_HP) {
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return 0;
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}
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s = splhigh();
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__asm __volatile (" movc %0, %%dfc;" /* select purge space */
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" movsl %3, %1@;" /* purge it */
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" movc %2, %%dfc;"
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: : "r" (FC_PURGE), "a" (r_va), "r" (FC_USERD),
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"r" (0));
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splx(s);
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return 1;
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}
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static __inline int __attribute__((__unused__))
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TBIAS_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
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if (mmutype != MMU_HP) {
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return 0;
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}
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*ip = 0x8000;
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return 1;
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}
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static __inline int __attribute__((__unused__))
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TBIAU_md(void)
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{
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volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
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if (mmutype != MMU_HP) {
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return 0;
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}
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*ip = 0;
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return 1;
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}
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#endif /* _HP300_CACHEOPS_MACHDEP_H_ */
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