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12c35ee2d2
NetBSD/sys/arch/mips/include
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simonb 12c35ee2d2 New generic way-aware MIPS32/64 range-index cache functions with proper 
handling for phyiscally-indexed caches where the way size is greater than
the page size.
These work fine with pass 1 SB1 cores, so g/c those workarounds.

Much thanks to Chris Demetriou for many suggestions and helping me get
my head around all this.
2002-11-24 07:41:29 +00:00
..
ansi.h Add _LP64 types. 2002-11-03 17:43:07 +00:00
aout_machdep.h
asm.h Remove an ELF-related comment that isn't needed any more. 2002-06-05 06:02:52 +00:00
bsd-aout.h
bswap.h
bus_dma.h
bus_space.h
cache_mipsNN.h New generic way-aware MIPS32/64 range-index cache functions with proper 2002-11-24 07:41:29 +00:00
cache_r3k.h
cache_r4k.h Add cache_r4k_op_8lines_{16,32} macros to perform cache ops on 8 2002-11-17 06:40:43 +00:00
cache_r5900.h
cache_tx39.h
cache.h Make cache size/mask variables unsigned. 2002-11-09 19:34:39 +00:00
cachectl.h
cdefs.h
cpu.h Move the curpcb and segbase extern decls to cpu.h to better group together 2002-11-24 07:26:04 +00:00
cpuregs.h Define COP0_HAZARD_FPUENABLE as four nops. 2002-11-15 01:15:11 +00:00
db_machdep.h
ecoff_machdep.h
elf_machdep.h
endian_machdep.h
endian.h
float.h
ieee.h
ieeefp.h
int_const.h Add LP64 macros. 2002-11-03 19:24:55 +00:00
int_fmtio.h Add LP64 types, limits, formats. 2002-11-03 19:55:23 +00:00
int_limits.h Add LP64 types, limits, formats. 2002-11-03 19:55:23 +00:00
int_mwgwtypes.h Add LP64 types, limits, formats. 2002-11-03 19:55:23 +00:00
int_types.h Add LP64 types. 2002-11-03 19:22:00 +00:00
isa_machdep.h
kcore.h
kdbparam.h
limits.h Add LP64 limits. 2002-11-03 20:02:39 +00:00
lock.h Bring down from nathanw_sa branch. 2002-09-16 07:00:43 +00:00
locore.h Use named indices for RA, SR, MULLO, MULHI, and EPC in the 2002-11-04 20:02:09 +00:00
Makefile Implement pmc(9) -- An interface to hardware performance monitoring 2002-08-07 05:14:47 +00:00
Makefile.inc
math.h
mips1_pte.h
mips3_pte.h Add 64MB and 256MB tlb page masks. 2002-06-24 05:46:47 +00:00
mips_opcode.h Overhaul the emulation facility. We do this by: 2002-07-06 23:59:18 +00:00
mips_param.h
mipsNN.h Add the VI bit in config 0. 2002-11-24 07:28:42 +00:00
pcb.h Move the curpcb and segbase extern decls to cpu.h to better group together 2002-11-24 07:26:04 +00:00
pci_machdep.h Let machine-dependent code specify how to enumerate the bus. 2002-05-15 19:23:51 +00:00
pmap.h it really helps to get the stub right before cutting + pasting it 27 times. 2002-09-22 07:53:39 +00:00
pmc.h Implement pmc(9) -- An interface to hardware performance monitoring 2002-08-07 05:14:47 +00:00
proc.h Make md_ss_addr a vaddr_t. 2002-11-09 20:05:57 +00:00
profile.h
psl.h
pte.h eliminate PT_ENTRY_NULL in favor of plain old NULL. 2002-10-14 05:11:21 +00:00
ptrace.h
r3900regs.h
r5900regs.h White space nits. 2002-11-15 00:58:32 +00:00
reg.h
regdef.h Add SGI-compatible ta0-ta3 register names. These allow one to write 2002-11-04 03:38:32 +00:00
regnum.h Add TA0-TA3 register indices. 2002-11-04 04:24:48 +00:00
reloc.h
rnd.h
sb1regs.h Declare some CP0 hazards for the SB1 core. 2002-11-15 01:09:20 +00:00
setjmp.h
signal.h
stdarg.h
svr4_machdep.h
sysarch.h White space nits, add a #endif comment. 2002-07-19 03:13:55 +00:00
trap.h
types.h In the _MIPS_PADDR_T_64BIT case, only use "unsigned long long" if _LP64 2002-11-03 17:35:32 +00:00
userret.h
varargs.h
vmparam.h