74ab5e8006
omitted when our GDB was updated.
63 lines
2.4 KiB
C
63 lines
2.4 KiB
C
/* dbg_cp.h -- ARMulator debug interface: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef Dbg_CP__h
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#define Dbg_CP__h
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#define Dbg_Access_Readable 1
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#define Dbg_Access_Writable 2
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#define Dbg_Access_CPDT 4 /* else CPRT */
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typedef struct {
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unsigned short rmin, rmax;
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/* a single description can be used for a range of registers with
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the same properties *accessed via CPDT instructions*
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*/
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unsigned char nbytes; /* size of register */
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unsigned char access; /* see above (Access_xxx) */
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union {
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struct { /* CPDT instructions do not allow the coprocessor much freedom:
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only bit 22 ('N') and 12-15 ('CRd') are free for the
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coprocessor to use as it sees fit.
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*/
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unsigned char nbit;
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unsigned char rdbits;
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} cpdt;
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struct { /* CPRT instructions have much more latitude. The bits fixed
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by the ARM are 24..31 (condition mask & opcode)
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20 (direction)
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8..15 (cpnum, arm register)
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4 (CPRT not CPDO)
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leaving 14 bits free to the coprocessor (fortunately
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falling within two bytes).
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*/
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unsigned char read_b0, read_b1,
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write_b0, write_b1;
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} cprt;
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} accessinst;
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} Dbg_CoProRegDesc;
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struct Dbg_CoProDesc {
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int entries;
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Dbg_CoProRegDesc regdesc[1/* really nentries */];
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};
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#define Dbg_CoProDesc_Size(n) (sizeof(struct Dbg_CoProDesc) + (n-1)*sizeof(Dbg_CoProRegDesc))
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#endif
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