182 lines
5.0 KiB
C
182 lines
5.0 KiB
C
/* Native-dependent code for BSD Unix running on i386's, for GDB.
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Copyright 1988, 1989, 1991, 1992, 1994, 1996 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/ptrace.h>
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#include <sys/user.h>
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#include <machine/reg.h>
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#include "inferior.h"
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#include "gdbcore.h"
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#include "target.h"
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void
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fetch_inferior_registers(regno)
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int regno;
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{
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struct reg inferior_registers;
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struct fpreg fp_registers;
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int loop;
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/* integer registers */
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ptrace(PT_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &inferior_registers, 0);
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memcpy(®isters[REGISTER_BYTE(0)], &inferior_registers, 4*16);
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memcpy(®isters[REGISTER_BYTE(PS_REGNUM)], &inferior_registers.r_cpsr, 4);
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/* floating point registers */
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ptrace(PT_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fp_registers, 0);
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memcpy(®isters[REGISTER_BYTE(F0_REGNUM)], &fp_registers.fpr[0], 12*8);
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memcpy(®isters[REGISTER_BYTE(FPS_REGNUM)], &fp_registers.fpr_fpsr, 4);
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registers_fetched ();
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}
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void
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store_inferior_registers(regno)
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int regno;
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{
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struct reg inferior_registers;
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struct fpreg fp_registers;
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/* integer registers */
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memcpy(&inferior_registers.r_cpsr, ®isters[REGISTER_BYTE(PS_REGNUM)], 4);
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memcpy(&inferior_registers, ®isters[REGISTER_BYTE(0)], 4*16);
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ptrace(PT_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &inferior_registers, 0);
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/* floating point registers */
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memcpy(&fp_registers.fpr_fpsr, ®isters[REGISTER_BYTE(FPS_REGNUM)], 4);
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memcpy(&fp_registers.fpr[0], ®isters[REGISTER_BYTE(F0_REGNUM)], 12*8);
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ptrace(PT_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fp_registers, 0);
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}
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struct md_core {
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struct reg intreg;
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struct fpreg freg;
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};
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void
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fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
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char *core_reg_sect;
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unsigned core_reg_size;
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int which;
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unsigned int ignore;
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{
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struct md_core *core_reg = (struct md_core *)core_reg_sect;
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/* integer registers */
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memcpy(®isters[REGISTER_BYTE(0)], &core_reg->intreg, 4*16);
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memcpy(®isters[REGISTER_BYTE(PS_REGNUM)], &core_reg->intreg.r_cpsr, 4);
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/* floating point registers */
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memcpy(®isters[REGISTER_BYTE(F0_REGNUM)], &core_reg->freg.fpr[0], 12*8);
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memcpy(®isters[REGISTER_BYTE(FPS_REGNUM)], &core_reg->freg.fpr_fpsr, 4);
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}
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int
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kernel_u_size ()
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{
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return (sizeof (struct user));
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}
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/*
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* NetBSD core stuf should be in netbsd-core.c
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*/
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static struct core_fns netbsd_core_fns =
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{
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bfd_target_unknown_flavour,
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fetch_core_registers,
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NULL
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};
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void
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_initialize_core_netbsd ()
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{
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add_core_fns (&netbsd_core_fns);
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}
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/* Single stepping support */
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static char breakpoint_shadow[BREAKPOINT_MAX];
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static CORE_ADDR next_pc;
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/* Non-zero if we just simulated a single-step ptrace call. This is
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* needed because we cannot remove the breakpoints in the inferior
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* process until after the `wait' in `wait_for_inferior'.
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*/
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int one_stepped;
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/* single_step() is called just before we want to resume the inferior,
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* if we want to single-step it but there is no hardware or kernel
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* single-step support. We find all the possible targets of the
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* coming instruction and breakpoint them.
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*
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* single_step is also called just after the inferior stops. If we had
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* set up a simulated single-step, we undo our damage.
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*/
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void
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single_step (ignore)
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int ignore; /* signal, but we don't need it */
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{
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CORE_ADDR arm_pc;
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if (!one_stepped)
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{
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/*
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* Ok arm_pc is the address of the instruction will will run
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* when we resume.
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* Analyse the instruction at this address to work out the
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* address of the next instruction.
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*/
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arm_pc = read_register(PC_REGNUM);
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next_pc = arm_get_next_pc(arm_pc);
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target_insert_breakpoint(next_pc, breakpoint_shadow);
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/* printf_unfiltered("pc=%x: set break at %x\n", arm_pc, next_pc);*/
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/* We are ready to let it go */
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one_stepped = 1;
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return;
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}
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else
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{
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/* Remove breakpoints */
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target_remove_breakpoint(next_pc, breakpoint_shadow);
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one_stepped = 0;
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}
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}
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/*
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* Temporary routine to warn folks this code is still experimental
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*/
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extern char *target_name;
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void
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_initialize_arm_bnat ()
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{
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printf_unfiltered("%s target configuration is high experimental\n", target_name);
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printf_unfiltered("Report any problems to amb@physig.ph.kcl.ac.uk\n\n");
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}
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