858 lines
21 KiB
C
858 lines
21 KiB
C
/* Target-dependent code for the Acorn Risc Machine, for GDB, the GNU Debugger.
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Copyright 1988, 1989, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#if 0
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#include "gdbcore.h"
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#include <sys/param.h>
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#include <sys/dir.h>
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#include <signal.h>
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#include <sys/ioctl.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#define N_TXTADDR(hdr) 0x8000
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#define N_DATADDR(hdr) (hdr.a_text + 0x8000)
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#include <sys/user.h> /* After a.out.h */
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#include <sys/file.h>
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#include "gdb_stat.h"
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#include <errno.h>
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#endif
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#if 0
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/* Work with core dump and executable files, for GDB.
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This code would be in corefile.c if it weren't machine-dependent. */
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/* Structure to describe the chain of shared libraries used
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by the execfile.
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e.g. prog shares Xt which shares X11 which shares c. */
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struct shared_library {
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struct exec_header header;
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char name[SHLIBLEN];
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CORE_ADDR text_start; /* CORE_ADDR of 1st byte of text, this file */
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long data_offset; /* offset of data section in file */
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int chan; /* file descriptor for the file */
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struct shared_library *shares; /* library this one shares */
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};
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static struct shared_library *shlib = 0;
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/* Hook for `exec_file_command' command to call. */
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extern void (*exec_file_display_hook) ();
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static CORE_ADDR unshared_text_start;
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/* extended header from exec file (for shared library info) */
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static struct exec_header exec_header;
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void
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exec_file_command (filename, from_tty)
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char *filename;
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int from_tty;
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{
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int val;
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/* Eliminate all traces of old exec file.
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Mark text segment as empty. */
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if (execfile)
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free (execfile);
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execfile = 0;
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data_start = 0;
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data_end -= exec_data_start;
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text_start = 0;
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unshared_text_start = 0;
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text_end = 0;
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exec_data_start = 0;
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exec_data_end = 0;
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if (execchan >= 0)
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close (execchan);
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execchan = -1;
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if (shlib) {
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close_shared_library(shlib);
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shlib = 0;
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}
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/* Now open and digest the file the user requested, if any. */
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if (filename)
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{
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filename = tilde_expand (filename);
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make_cleanup (free, filename);
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execchan = openp (getenv ("PATH"), 1, filename, O_RDONLY, 0,
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&execfile);
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if (execchan < 0)
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perror_with_name (filename);
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{
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struct stat st_exec;
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#ifdef HEADER_SEEK_FD
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HEADER_SEEK_FD (execchan);
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#endif
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val = myread (execchan, &exec_header, sizeof exec_header);
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exec_aouthdr = exec_header.a_exec;
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if (val < 0)
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perror_with_name (filename);
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text_start = 0x8000;
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/* Look for shared library if needed */
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if (exec_header.a_exec.a_magic & MF_USES_SL)
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shlib = open_shared_library(exec_header.a_shlibname, text_start);
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text_offset = N_TXTOFF (exec_aouthdr);
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exec_data_offset = N_TXTOFF (exec_aouthdr) + exec_aouthdr.a_text;
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if (shlib) {
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unshared_text_start = shared_text_end(shlib) & ~0x7fff;
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stack_start = shlib->header.a_exec.a_sldatabase;
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stack_end = STACK_END_ADDR;
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} else
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unshared_text_start = 0x8000;
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text_end = unshared_text_start + exec_aouthdr.a_text;
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exec_data_start = unshared_text_start + exec_aouthdr.a_text;
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exec_data_end = exec_data_start + exec_aouthdr.a_data;
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data_start = exec_data_start;
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data_end += exec_data_start;
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fstat (execchan, &st_exec);
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exec_mtime = st_exec.st_mtime;
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}
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validate_files ();
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}
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else if (from_tty)
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printf ("No exec file now.\n");
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/* Tell display code (if any) about the changed file name. */
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if (exec_file_display_hook)
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(*exec_file_display_hook) (filename);
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}
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#endif
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#if 0
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/* Read from the program's memory (except for inferior processes).
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This function is misnamed, since it only reads, never writes; and
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since it will use the core file and/or executable file as necessary.
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It should be extended to write as well as read, FIXME, for patching files.
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Return 0 if address could be read, EIO if addresss out of bounds. */
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int
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xfer_core_file (memaddr, myaddr, len)
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CORE_ADDR memaddr;
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char *myaddr;
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int len;
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{
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register int i;
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register int val;
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int xferchan;
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char **xferfile;
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int fileptr;
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int returnval = 0;
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while (len > 0)
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{
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xferfile = 0;
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xferchan = 0;
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/* Determine which file the next bunch of addresses reside in,
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and where in the file. Set the file's read/write pointer
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to point at the proper place for the desired address
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and set xferfile and xferchan for the correct file.
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If desired address is nonexistent, leave them zero.
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i is set to the number of bytes that can be handled
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along with the next address.
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We put the most likely tests first for efficiency. */
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/* Note that if there is no core file
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data_start and data_end are equal. */
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if (memaddr >= data_start && memaddr < data_end)
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{
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i = min (len, data_end - memaddr);
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fileptr = memaddr - data_start + data_offset;
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xferfile = &corefile;
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xferchan = corechan;
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}
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/* Note that if there is no core file
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stack_start and stack_end define the shared library data. */
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else if (memaddr >= stack_start && memaddr < stack_end)
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{
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if (corechan < 0) {
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struct shared_library *lib;
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for (lib = shlib; lib; lib = lib->shares)
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if (memaddr >= lib->header.a_exec.a_sldatabase &&
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memaddr < lib->header.a_exec.a_sldatabase +
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lib->header.a_exec.a_data)
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break;
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if (lib) {
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i = min (len, lib->header.a_exec.a_sldatabase +
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lib->header.a_exec.a_data - memaddr);
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fileptr = lib->data_offset + memaddr -
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lib->header.a_exec.a_sldatabase;
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xferfile = execfile;
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xferchan = lib->chan;
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}
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} else {
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i = min (len, stack_end - memaddr);
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fileptr = memaddr - stack_start + stack_offset;
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xferfile = &corefile;
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xferchan = corechan;
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}
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}
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else if (corechan < 0
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&& memaddr >= exec_data_start && memaddr < exec_data_end)
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{
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i = min (len, exec_data_end - memaddr);
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fileptr = memaddr - exec_data_start + exec_data_offset;
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xferfile = &execfile;
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xferchan = execchan;
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}
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else if (memaddr >= text_start && memaddr < text_end)
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{
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struct shared_library *lib;
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for (lib = shlib; lib; lib = lib->shares)
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if (memaddr >= lib->text_start &&
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memaddr < lib->text_start + lib->header.a_exec.a_text)
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break;
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if (lib) {
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i = min (len, lib->header.a_exec.a_text +
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lib->text_start - memaddr);
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fileptr = memaddr - lib->text_start + text_offset;
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xferfile = &execfile;
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xferchan = lib->chan;
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} else {
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i = min (len, text_end - memaddr);
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fileptr = memaddr - unshared_text_start + text_offset;
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xferfile = &execfile;
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xferchan = execchan;
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}
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}
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else if (memaddr < text_start)
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{
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i = min (len, text_start - memaddr);
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}
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else if (memaddr >= text_end
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&& memaddr < (corechan >= 0? data_start : exec_data_start))
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{
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i = min (len, data_start - memaddr);
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}
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else if (corechan >= 0
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&& memaddr >= data_end && memaddr < stack_start)
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{
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i = min (len, stack_start - memaddr);
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}
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else if (corechan < 0 && memaddr >= exec_data_end)
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{
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i = min (len, - memaddr);
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}
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else if (memaddr >= stack_end && stack_end != 0)
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{
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i = min (len, - memaddr);
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}
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else
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{
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/* Address did not classify into one of the known ranges.
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This shouldn't happen; we catch the endpoints. */
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fatal ("Internal: Bad case logic in xfer_core_file.");
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}
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/* Now we know which file to use.
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Set up its pointer and transfer the data. */
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if (xferfile)
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{
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if (*xferfile == 0)
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if (xferfile == &execfile)
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error ("No program file to examine.");
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else
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error ("No core dump file or running program to examine.");
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val = lseek (xferchan, fileptr, 0);
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if (val < 0)
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perror_with_name (*xferfile);
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val = myread (xferchan, myaddr, i);
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if (val < 0)
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perror_with_name (*xferfile);
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}
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/* If this address is for nonexistent memory,
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read zeros if reading, or do nothing if writing.
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Actually, we never right. */
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else
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{
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memset (myaddr, '\0', i);
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returnval = EIO;
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}
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memaddr += i;
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myaddr += i;
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len -= i;
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}
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return returnval;
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}
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#endif
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/* APCS (ARM procedure call standard) defines the following prologue:
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mov ip, sp
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[stmfd sp!, {a1,a2,a3,a4}]
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stmfd sp!, {...,fp,ip,lr,pc}
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[stfe f7, [sp, #-12]!]
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[stfe f6, [sp, #-12]!]
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[stfe f5, [sp, #-12]!]
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[stfe f4, [sp, #-12]!]
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sub fp, ip, #nn // nn == 20 or 4 depending on second ins
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*/
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CORE_ADDR
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skip_prologue(pc)
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CORE_ADDR pc;
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{
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CORE_ADDR skip_pc = pc;
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#if 0
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union insn_fmt op;
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op.ins = read_memory_integer(skip_pc, 4);
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/* look for the "mov ip,sp" */
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if (op.generic.type != TYPE_ARITHMETIC ||
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op.arith.opcode != OPCODE_MOV ||
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op.arith.dest != SPTEMP ||
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op.arith.operand2 != SP) return pc;
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skip_pc += 4;
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/* skip the "stmfd sp!,{a1,a2,a3,a4}" if its there */
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op.ins = read_memory_integer(skip_pc, 4);
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if (op.generic.type == TYPE_BLOCK_BRANCH &&
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op.generic.subtype == SUBTYPE_BLOCK &&
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op.block.mask == 0xf &&
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op.block.base == SP &&
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op.block.is_load == 0 &&
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op.block.writeback == 1 &&
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op.block.increment == 0 &&
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op.block.before == 1) skip_pc += 4;
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/* skip the "stmfd sp!,{...,fp,ip,lr,pc} */
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op.ins = read_memory_integer(skip_pc, 4);
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if (op.generic.type != TYPE_BLOCK_BRANCH ||
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op.generic.subtype != SUBTYPE_BLOCK ||
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/* the mask should look like 110110xxxxxx0000 */
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(op.block.mask & 0xd800) != 0xd800 ||
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op.block.base != SP ||
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op.block.is_load != 0 ||
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op.block.writeback != 1 ||
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op.block.increment != 0 ||
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op.block.before != 1) return pc;
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skip_pc += 4;
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/* check for "sub fp,ip,#nn" */
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op.ins = read_memory_integer(skip_pc, 4);
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if (op.generic.type != TYPE_ARITHMETIC ||
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op.arith.opcode != OPCODE_SUB ||
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op.arith.dest != FP ||
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op.arith.operand1 != SPTEMP) return pc;
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#endif
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return skip_pc + 4;
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}
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void
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arm_frame_find_saved_regs (frame_info, saved_regs_addr)
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struct frame_info *frame_info;
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struct frame_saved_regs *saved_regs_addr;
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{
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register int regnum;
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register int frame;
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register int next_addr;
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register int return_data_save;
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register int saved_register_mask;
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memset (saved_regs_addr, '\0', sizeof (*saved_regs_addr));
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frame = frame_info->frame;
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return_data_save = ADDR_BITS_REMOVE(read_memory_integer (frame, 4)) - 12;
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saved_register_mask = read_memory_integer (return_data_save, 4);
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next_addr = frame - 12;
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for (regnum = 4; regnum < 10; regnum++)
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if (saved_register_mask & (1 << regnum))
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{
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next_addr -= 4;
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saved_regs_addr->regs[regnum] = next_addr;
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}
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#if defined(F0_REGNUM)
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if (read_memory_integer (return_data_save + 4, 4) == 0xed6d7103)
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{
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next_addr -= 12;
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saved_regs_addr->regs[F0_REGNUM + 7] = next_addr;
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}
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if (read_memory_integer (return_data_save + 8, 4) == 0xed6d6103)
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{
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next_addr -= 12;
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saved_regs_addr->regs[F0_REGNUM + 6] = next_addr;
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}
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if (read_memory_integer (return_data_save + 12, 4) == 0xed6d5103)
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{
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next_addr -= 12;
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saved_regs_addr->regs[F0_REGNUM + 5] = next_addr;
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}
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if (read_memory_integer(return_data_save + 16, 4) == 0xed6d4103)
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{
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next_addr -= 12;
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saved_regs_addr->regs[F0_REGNUM + 4] = next_addr;
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}
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#endif
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saved_regs_addr->regs[SP_REGNUM] = next_addr;
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saved_regs_addr->regs[PC_REGNUM] = frame - 4;
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saved_regs_addr->regs[PS_REGNUM] = frame - 4;
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saved_regs_addr->regs[FP_REGNUM] = frame - 12;
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}
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static void
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print_fpu_flags(flags)
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int flags;
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{
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if (flags & (1 << 0)) fputs("IVO ", stdout);
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if (flags & (1 << 1)) fputs("DVZ ", stdout);
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if (flags & (1 << 2)) fputs("OFL ", stdout);
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if (flags & (1 << 3)) fputs("UFL ", stdout);
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if (flags & (1 << 4)) fputs("INX ", stdout);
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putchar('\n');
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}
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#if defined(FPS_REGNUM)
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void
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arm_float_info()
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{
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register unsigned long status = read_register(FPS_REGNUM);
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int type;
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type = (status >> 24) & 127;
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printf("%s FPU type %d\n",
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(status & (1<<31)) ? "Hardware" : "Software",
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type);
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fputs("mask: ", stdout);
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print_fpu_flags(status >> 16);
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fputs("flags: ", stdout);
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print_fpu_flags(status);
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}
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#endif
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static void arm_othernames()
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{
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static int toggle;
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static char *original[] = ORIGINAL_REGISTER_NAMES;
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static char *extra_crispy[] = ADDITIONAL_REGISTER_NAMES;
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memcpy (reg_names, toggle ? extra_crispy : original, sizeof(original));
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toggle = !toggle;
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}
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void
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_initialize_arm_tdep ()
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{
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tm_print_insn = print_insn_little_arm;
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add_com ("othernames", class_obscure, arm_othernames);
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}
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/* FIXME: Fill in with the 'right thing', see asm
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template in arm-convert.s */
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#if 0
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void
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convert_from_extended (ptr, dbl)
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void *ptr;
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double *dbl;
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{
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*dbl = *(double*)ptr;
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}
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void
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convert_to_extended (dbl, ptr)
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void *ptr;
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double *dbl;
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{
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*(double*)ptr = *dbl;
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}
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#endif
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int
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arm_nullified_insn (inst)
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unsigned long inst;
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{
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unsigned long cond = inst & 0xf0000000;
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unsigned long status_reg;
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if (cond == INST_AL || cond == INST_NV)
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return 0;
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status_reg = read_register (PS_REGNUM);
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switch (cond)
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{
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case INST_EQ:
|
||
return ((status_reg & FLAG_Z) == 0);
|
||
case INST_NE:
|
||
return ((status_reg & FLAG_Z) != 0);
|
||
case INST_CS:
|
||
return ((status_reg & FLAG_C) == 0);
|
||
case INST_CC:
|
||
return ((status_reg & FLAG_C) != 0);
|
||
case INST_MI:
|
||
return ((status_reg & FLAG_N) == 0);
|
||
case INST_PL:
|
||
return ((status_reg & FLAG_N) != 0);
|
||
case INST_VS:
|
||
return ((status_reg & FLAG_V) == 0);
|
||
case INST_VC:
|
||
return ((status_reg & FLAG_V) != 0);
|
||
case INST_HI:
|
||
return ((status_reg & (FLAG_C | FLAG_Z)) != FLAG_C);
|
||
case INST_LS:
|
||
return (((status_reg & (FLAG_C | FLAG_Z)) ^ FLAG_C) == 0);
|
||
case INST_GE:
|
||
return (((status_reg & FLAG_N) == 0) != ((status_reg & FLAG_V) == 0));
|
||
case INST_LT:
|
||
return (((status_reg & FLAG_N) == 0) == ((status_reg & FLAG_V) == 0));
|
||
case INST_GT:
|
||
return (((status_reg & FLAG_Z) != 0) ||
|
||
(((status_reg & FLAG_N) == 0) != ((status_reg & FLAG_V) == 0)));
|
||
case INST_LE:
|
||
return (((status_reg & FLAG_Z) == 0) &&
|
||
(((status_reg & FLAG_N) == 0) == ((status_reg & FLAG_V) == 0)));
|
||
}
|
||
return 0;
|
||
}
|
||
|
||
|
||
|
||
/* taken from remote-arm.c .. */
|
||
|
||
#define submask(x) ((1L << ((x) + 1)) - 1)
|
||
#define bit(obj,st) (((obj) & (1L << (st))) >> st)
|
||
#define bits(obj,st,fn) \
|
||
(((obj) & submask (fn) & ~ submask ((st) - 1)) >> (st))
|
||
#define sbits(obj,st,fn) \
|
||
((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
|
||
#define BranchDest(addr,instr) \
|
||
((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
|
||
#define ARM_PC_32 1
|
||
|
||
static unsigned long
|
||
shifted_reg_val (inst, carry, pc_val)
|
||
unsigned long inst;
|
||
int carry;
|
||
unsigned long pc_val;
|
||
{
|
||
unsigned long res, shift;
|
||
int rm = bits (inst, 0, 3);
|
||
unsigned long shifttype = bits (inst, 5, 6);
|
||
|
||
if (bit(inst, 4))
|
||
{
|
||
int rs = bits (inst, 8, 11);
|
||
shift = (rs == 15 ? pc_val + 8 : read_register (rs)) & 0xFF;
|
||
}
|
||
else
|
||
shift = bits (inst, 7, 11);
|
||
|
||
res = (rm == 15
|
||
? ((pc_val | (ARM_PC_32 ? 0 : read_register (PS_REGNUM)))
|
||
+ (bit (inst, 4) ? 12 : 8))
|
||
: read_register (rm));
|
||
|
||
switch (shifttype)
|
||
{
|
||
case 0: /* LSL */
|
||
res = shift >= 32 ? 0 : res << shift;
|
||
break;
|
||
|
||
case 1: /* LSR */
|
||
res = shift >= 32 ? 0 : res >> shift;
|
||
break;
|
||
|
||
case 2: /* ASR */
|
||
if (shift >= 32) shift = 31;
|
||
res = ((res & 0x80000000L)
|
||
? ~((~res) >> shift) : res >> shift);
|
||
break;
|
||
|
||
case 3: /* ROR/RRX */
|
||
shift &= 31;
|
||
if (shift == 0)
|
||
res = (res >> 1) | (carry ? 0x80000000L : 0);
|
||
else
|
||
res = (res >> shift) | (res << (32-shift));
|
||
break;
|
||
}
|
||
|
||
return res & 0xffffffff;
|
||
}
|
||
|
||
|
||
CORE_ADDR
|
||
arm_get_next_pc (pc)
|
||
CORE_ADDR pc;
|
||
{
|
||
unsigned long pc_val = (unsigned long) pc;
|
||
unsigned long this_instr = read_memory_integer (pc, 4);
|
||
unsigned long status = read_register (PS_REGNUM);
|
||
CORE_ADDR nextpc = (CORE_ADDR) (pc_val + 4); /* Default case */
|
||
|
||
if (! arm_nullified_insn (this_instr))
|
||
{
|
||
switch (bits(this_instr, 24, 27))
|
||
{
|
||
case 0x0: case 0x1: /* data processing */
|
||
case 0x2: case 0x3:
|
||
{
|
||
unsigned long operand1, operand2, result = 0;
|
||
unsigned long rn;
|
||
int c;
|
||
|
||
if (bits(this_instr, 12, 15) != 15)
|
||
break;
|
||
|
||
if (bits (this_instr, 22, 25) == 0
|
||
&& bits (this_instr, 4, 7) == 9) /* multiply */
|
||
error ("Illegal update to pc in instruction");
|
||
|
||
/* Multiply into PC */
|
||
c = (status & FLAG_C) ? 1 : 0;
|
||
rn = bits (this_instr, 16, 19);
|
||
operand1 = (rn == 15) ? pc_val + 8 : read_register (rn);
|
||
|
||
if (bit (this_instr, 25))
|
||
{
|
||
unsigned long immval = bits (this_instr, 0, 7);
|
||
unsigned long rotate = 2 * bits (this_instr, 8, 11);
|
||
operand2 = ((immval >> rotate) | (immval << (32-rotate))
|
||
& 0xffffffff);
|
||
}
|
||
else /* operand 2 is a shifted register */
|
||
operand2 = shifted_reg_val (this_instr, c, pc_val);
|
||
|
||
switch (bits (this_instr, 21, 24))
|
||
{
|
||
case 0x0: /*and*/
|
||
result = operand1 & operand2;
|
||
break;
|
||
|
||
case 0x1: /*eor*/
|
||
result = operand1 ^ operand2;
|
||
break;
|
||
|
||
case 0x2: /*sub*/
|
||
result = operand1 - operand2;
|
||
break;
|
||
|
||
case 0x3: /*rsb*/
|
||
result = operand2 - operand1;
|
||
break;
|
||
|
||
case 0x4: /*add*/
|
||
result = operand1 + operand2;
|
||
break;
|
||
|
||
case 0x5: /*adc*/
|
||
result = operand1 + operand2 + c;
|
||
break;
|
||
|
||
case 0x6: /*sbc*/
|
||
result = operand1 - operand2 + c;
|
||
break;
|
||
|
||
case 0x7: /*rsc*/
|
||
result = operand2 - operand1 + c;
|
||
break;
|
||
|
||
case 0x8: case 0x9: case 0xa: case 0xb: /* tst, teq, cmp, cmn */
|
||
result = (unsigned long) nextpc;
|
||
break;
|
||
|
||
case 0xc: /*orr*/
|
||
result = operand1 | operand2;
|
||
break;
|
||
|
||
case 0xd: /*mov*/
|
||
/* Always step into a function. */
|
||
result = operand2;
|
||
break;
|
||
|
||
case 0xe: /*bic*/
|
||
result = operand1 & ~operand2;
|
||
break;
|
||
|
||
case 0xf: /*mvn*/
|
||
result = ~operand2;
|
||
break;
|
||
}
|
||
nextpc = (CORE_ADDR) ADDR_BITS_REMOVE (result);
|
||
|
||
if (nextpc == pc)
|
||
error ("Infinite loop detected");
|
||
break;
|
||
}
|
||
|
||
case 0x4: case 0x5: /* data transfer */
|
||
case 0x6: case 0x7:
|
||
if (bit (this_instr, 20))
|
||
{
|
||
/* load */
|
||
if (bits (this_instr, 12, 15) == 15)
|
||
{
|
||
/* rd == pc */
|
||
unsigned long rn;
|
||
unsigned long base;
|
||
|
||
if (bit (this_instr, 22))
|
||
error ("Illegal update to pc in instruction");
|
||
|
||
/* byte write to PC */
|
||
rn = bits (this_instr, 16, 19);
|
||
base = (rn == 15) ? pc_val + 8 : read_register (rn);
|
||
if (bit (this_instr, 24))
|
||
{
|
||
/* pre-indexed */
|
||
int c = (status & FLAG_C) ? 1 : 0;
|
||
unsigned long offset =
|
||
(bit (this_instr, 25)
|
||
? shifted_reg_val (this_instr, c, pc_val)
|
||
: bits (this_instr, 0, 11));
|
||
|
||
if (bit (this_instr, 23))
|
||
base += offset;
|
||
else
|
||
base -= offset;
|
||
}
|
||
nextpc = (CORE_ADDR) read_memory_integer ((CORE_ADDR) base,
|
||
4);
|
||
|
||
nextpc = ADDR_BITS_REMOVE (nextpc);
|
||
|
||
if (nextpc == pc)
|
||
error ("Infinite loop detected");
|
||
}
|
||
}
|
||
break;
|
||
|
||
case 0x8: case 0x9: /* block transfer */
|
||
if (bit (this_instr, 20))
|
||
{
|
||
/* LDM */
|
||
if (bit (this_instr, 15))
|
||
{
|
||
/* loading pc */
|
||
int offset = 0;
|
||
|
||
if (bit (this_instr, 23))
|
||
{
|
||
/* up */
|
||
unsigned long reglist = bits (this_instr, 0, 14);
|
||
unsigned long regbit;
|
||
|
||
for (; reglist != 0; reglist &= ~regbit)
|
||
{
|
||
regbit = reglist & (-reglist);
|
||
offset += 4;
|
||
}
|
||
|
||
if (bit (this_instr, 24)) /* pre */
|
||
offset += 4;
|
||
}
|
||
else if (bit (this_instr, 24))
|
||
offset = -4;
|
||
|
||
{
|
||
unsigned long rn_val =
|
||
read_register (bits (this_instr, 16, 19));
|
||
nextpc =
|
||
(CORE_ADDR) read_memory_integer ((CORE_ADDR) (rn_val
|
||
+ offset),
|
||
4);
|
||
}
|
||
nextpc = ADDR_BITS_REMOVE (nextpc);
|
||
if (nextpc == pc)
|
||
error ("Infinite loop detected");
|
||
}
|
||
}
|
||
break;
|
||
|
||
case 0xb: /* branch & link */
|
||
case 0xa: /* branch */
|
||
{
|
||
nextpc = BranchDest (pc, this_instr);
|
||
|
||
nextpc = ADDR_BITS_REMOVE (nextpc);
|
||
if (nextpc == pc)
|
||
error ("Infinite loop detected");
|
||
break;
|
||
}
|
||
|
||
case 0xc: case 0xd:
|
||
case 0xe: /* coproc ops */
|
||
case 0xf: /* SWI */
|
||
break;
|
||
|
||
default:
|
||
fprintf (stderr, "Bad bit-field extraction\n");
|
||
return (pc);
|
||
}
|
||
}
|
||
|
||
return nextpc;
|
||
}
|
||
|
||
|
||
#ifdef GET_LONGJMP_TARGET
|
||
|
||
/* Figure out where the longjmp will land. Slurp the args out of the stack.
|
||
We expect the first arg to be a pointer to the jmp_buf structure from which
|
||
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
|
||
This routine returns true on success. */
|
||
|
||
int
|
||
get_longjmp_target(pc)
|
||
CORE_ADDR *pc;
|
||
{
|
||
CORE_ADDR jb_addr;
|
||
char raw_buffer[MAX_REGISTER_RAW_SIZE];
|
||
|
||
jb_addr = read_register(0);
|
||
|
||
if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, raw_buffer,
|
||
sizeof(CORE_ADDR)))
|
||
return 0;
|
||
|
||
*pc = extract_address (raw_buffer, sizeof(CORE_ADDR));
|
||
return 1;
|
||
|
||
}
|
||
|
||
#endif /* GET_LONGJMP_TARGET */
|