351 lines
10 KiB
ArmAsm
351 lines
10 KiB
ArmAsm
#
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# $NetBSD: fskeletn.s,v 1.1 2000/04/14 20:24:38 is Exp $
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#
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#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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# MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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# M68000 Hi-Performance Microprocessor Division
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# M68060 Software Package Production Release
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#
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# M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
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# All rights reserved.
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#
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# THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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# To the maximum extent permitted by applicable law,
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# MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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# INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
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# FOR A PARTICULAR PURPOSE and any warranty against infringement with
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# regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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# and any accompanying written materials.
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#
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# To the maximum extent permitted by applicable law,
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# IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
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# BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
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# ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
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#
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# Motorola assumes no responsibility for the maintenance and support
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# of the SOFTWARE.
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#
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# You are hereby granted a copyright license to use, modify, and distribute the
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# SOFTWARE so long as this entire notice is retained without alteration
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# in any modified and/or redistributed versions, and that such modified
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# versions are clearly identified as such.
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# No licenses are granted by implication, estoppel or otherwise under any
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# patents or trademarks of Motorola, Inc.
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#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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#
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# fskeleton.s
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#
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# This file contains:
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# (1) example "Call-out"s
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# (2) example package entry code
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# (3) example "Call-out" table
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#
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#################################
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# (1) EXAMPLE CALL-OUTS #
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# #
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# _060_fpsp_done() #
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# _060_real_ovfl() #
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# _060_real_unfl() #
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# _060_real_operr() #
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# _060_real_snan() #
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# _060_real_dz() #
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# _060_real_inex() #
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# _060_real_bsun() #
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# _060_real_fline() #
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# _060_real_fpu_disabled() #
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# _060_real_trap() #
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#################################
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#
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# _060_fpsp_done():
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#
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# This is the main exit point for the 68060 Floating-Point
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# Software Package. For a normal exit, all 060FPSP routines call this
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# routine. The operating system can do system dependent clean-up or
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# simply execute an "rte" as with the sample code below.
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#
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global _060_fpsp_done
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_060_fpsp_done:
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rte
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#
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# _060_real_ovfl():
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#
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# This is the exit point for the 060FPSP when an enabled overflow exception
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# is present. The routine below should point to the operating system handler
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# for enabled overflow conditions. The exception stack frame is an overflow
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# stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_ovfl
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_060_real_ovfl:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_unfl():
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#
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# This is the exit point for the 060FPSP when an enabled underflow exception
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# is present. The routine below should point to the operating system handler
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# for enabled underflow conditions. The exception stack frame is an underflow
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# stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_unfl
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_060_real_unfl:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_operr():
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#
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# This is the exit point for the 060FPSP when an enabled operand error exception
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# is present. The routine below should point to the operating system handler
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# for enabled operand error exceptions. The exception stack frame is an operand error
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# stack frame. The FP state frame holds the source operand of the faulting
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# instruction.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_operr
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_060_real_operr:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_snan():
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#
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# This is the exit point for the 060FPSP when an enabled signalling NaN exception
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# is present. The routine below should point to the operating system handler
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# for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
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# stack frame. The FP state frame holds the source operand of the faulting
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# instruction.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_snan
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_060_real_snan:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_dz():
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#
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# This is the exit point for the 060FPSP when an enabled divide-by-zero exception
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# is present. The routine below should point to the operating system handler
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# for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
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# stack frame. The FP state frame holds the source operand of the faulting
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# instruction.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_dz
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_060_real_dz:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_inex():
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#
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# This is the exit point for the 060FPSP when an enabled inexact exception
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# is present. The routine below should point to the operating system handler
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# for enabled inexact exceptions. The exception stack frame is an inexact
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# stack frame. The FP state frame holds the source operand of the faulting
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# instruction.
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#
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# The sample routine below simply clears the exception status bit and
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# does an "rte".
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#
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global _060_real_inex
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_060_real_inex:
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fsave -(%sp)
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mov.w &0x6000,0x2(%sp)
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frestore (%sp)+
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rte
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#
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# _060_real_bsun():
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#
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# This is the exit point for the 060FPSP when an enabled bsun exception
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# is present. The routine below should point to the operating system handler
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# for enabled bsun exceptions. The exception stack frame is a bsun
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# stack frame.
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#
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# The sample routine below clears the exception status bit, clears the NaN
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# bit in the FPSR, and does an "rte". The instruction that caused the
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# bsun will now be re-executed but with the NaN FPSR bit cleared.
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#
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global _060_real_bsun
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_060_real_bsun:
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fsave -(%sp)
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fmov.l %fpsr,-(%sp)
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andi.b &0xfe,(%sp)
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fmov.l (%sp)+,%fpsr
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add.l &0xc,%sp
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rte
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#
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# _060_real_fline():
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#
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# This is the exit point for the 060FPSP when an F-Line Illegal exception is
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# encountered. Three different types of exceptions can enter the F-Line exception
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# vector number 11: FP Unimplemented Instructions, FP implemented instructions when
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# the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
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# _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
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# Illegals branch here.
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#
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global _060_real_fline
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_060_real_fline:
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bra.b _060_real_fline
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#
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# _060_real_fpu_disabled():
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#
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# This is the exit point for the 060FPSP when an FPU disabled exception is
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# encountered. Three different types of exceptions can enter the F-Line exception
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# vector number 11: FP Unimplemented Instructions, FP implemented instructions when
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# the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
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# _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
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# exceptions branch here.
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#
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# The sample code below enables the FPU, sets the PC field in the exception stack
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# frame to the PC of the instruction causing the exception, and does an "rte".
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# The execution of the instruction then proceeds with an enabled floating-point
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# unit.
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#
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global _060_real_fpu_disabled
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_060_real_fpu_disabled:
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mov.l %d0,-(%sp) # enabled the fpu
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movc %pcr,%d0
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bclr &0x1,%d0
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movc %d0,%pcr
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mov.l (%sp)+,%d0
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mov.l 0xc(%sp),0x2(%sp) # set "Current PC"
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rte
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#
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# _060_real_trap():
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#
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# This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
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# discovers that the trap condition is true and it should branch to the operating
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# system handler for the trap exception vector number 7.
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#
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# The sample code below simply executes an "rte".
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#
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global _060_real_trap
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_060_real_trap:
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rte
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#############################################################################
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##################################
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# (2) EXAMPLE PACKAGE ENTRY CODE #
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##################################
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global _060_fpsp_snan
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_060_fpsp_snan:
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bra.l _FP_CALL_TOP+0x80+0x00
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global _060_fpsp_operr
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_060_fpsp_operr:
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bra.l _FP_CALL_TOP+0x80+0x08
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global _060_fpsp_ovfl
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_060_fpsp_ovfl:
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bra.l _FP_CALL_TOP+0x80+0x10
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global _060_fpsp_unfl
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_060_fpsp_unfl:
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bra.l _FP_CALL_TOP+0x80+0x18
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global _060_fpsp_dz
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_060_fpsp_dz:
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bra.l _FP_CALL_TOP+0x80+0x20
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global _060_fpsp_inex
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_060_fpsp_inex:
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bra.l _FP_CALL_TOP+0x80+0x28
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global _060_fpsp_fline
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_060_fpsp_fline:
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bra.l _FP_CALL_TOP+0x80+0x30
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global _060_fpsp_unsupp
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_060_fpsp_unsupp:
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bra.l _FP_CALL_TOP+0x80+0x38
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global _060_fpsp_effadd
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_060_fpsp_effadd:
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bra.l _FP_CALL_TOP+0x80+0x40
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#############################################################################
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################################
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# (3) EXAMPLE CALL-OUT SECTION #
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################################
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# The size of this section MUST be 128 bytes!!!
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global _FP_CALL_TOP
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_FP_CALL_TOP:
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long _060_real_bsun - _FP_CALL_TOP
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long _060_real_snan - _FP_CALL_TOP
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long _060_real_operr - _FP_CALL_TOP
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long _060_real_ovfl - _FP_CALL_TOP
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long _060_real_unfl - _FP_CALL_TOP
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long _060_real_dz - _FP_CALL_TOP
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long _060_real_inex - _FP_CALL_TOP
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long _060_real_fline - _FP_CALL_TOP
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long _060_real_fpu_disabled - _FP_CALL_TOP
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long _060_real_trap - _FP_CALL_TOP
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long _060_real_trace - _FP_CALL_TOP
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long _060_real_access - _FP_CALL_TOP
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long _060_fpsp_done - _FP_CALL_TOP
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long 0x00000000, 0x00000000, 0x00000000
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long _060_imem_read - _FP_CALL_TOP
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long _060_dmem_read - _FP_CALL_TOP
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long _060_dmem_write - _FP_CALL_TOP
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long _060_imem_read_word - _FP_CALL_TOP
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long _060_imem_read_long - _FP_CALL_TOP
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long _060_dmem_read_byte - _FP_CALL_TOP
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long _060_dmem_read_word - _FP_CALL_TOP
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long _060_dmem_read_long - _FP_CALL_TOP
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long _060_dmem_write_byte - _FP_CALL_TOP
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long _060_dmem_write_word - _FP_CALL_TOP
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long _060_dmem_write_long - _FP_CALL_TOP
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long 0x00000000
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long 0x00000000, 0x00000000, 0x00000000, 0x00000000
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#############################################################################
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# 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
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