d2b9876081
from the calling code into uvm_pglistalloc() itself for consistency and easier error handling
427 lines
11 KiB
C
427 lines
11 KiB
C
/* $NetBSD: px.c,v 1.14 2002/06/02 14:44:46 drochner Exp $ */
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/*-
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* Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for DEC PixelStamp graphics adapters (PMAG-C).
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: px.c,v 1.14 2002/06/02 14:44:46 drochner Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/callout.h>
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#include <uvm/uvm_extern.h>
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#if defined(pmax)
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#include <mips/cpuregs.h>
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#elif defined(alpha)
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#include <alpha/alpha_cpu.h>
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#endif
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <dev/cons.h>
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#include <dev/wscons/wsconsio.h>
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/ic/bt459reg.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/sticreg.h>
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#include <dev/tc/sticio.h>
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#include <dev/tc/sticvar.h>
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#define PX_STIC_POLL_OFFSET 0x000000 /* STIC DMA poll space */
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#define PX_STAMP_OFFSET 0x0c0000 /* pixelstamp space on STIC */
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#define PX_STIC_OFFSET 0x180000 /* STIC registers */
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#define PX_VDAC_OFFSET 0x200000 /* VDAC registers (bt459) */
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#define PX_VDAC_RESET_OFFSET 0x300000 /* VDAC reset register */
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#define PX_ROM_OFFSET 0x300000 /* ROM code */
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#define PX_BUF_COUNT 16
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#define PX_BUF_INC(x) ((x + 1) & (PX_BUF_COUNT - 1))
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/*
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* We need enough aligned memory to hold:
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*
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* - Xserver communication area (4096 bytes)
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* - 16 packet buffers (4096 bytes each)
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* - 2 image buffers (5120 bytes each)
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*
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*/
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#define PX_BUF_SIZE \
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(STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE)
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#define PX_BUF_ALIGN 32768
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#define PXF_QUEUE 0x01
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void px_attach(struct device *, struct device *, void *);
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void px_init(struct stic_info *, int);
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int px_ioctl(struct stic_info *, u_long, caddr_t, int, struct proc *);
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int px_match(struct device *, struct cfdata *, void *);
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int px_intr(void *);
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u_int32_t *px_pbuf_get(struct stic_info *);
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int px_pbuf_post(struct stic_info *, u_int32_t *);
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void px_cnattach(tc_addr_t);
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struct px_softc {
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struct device px_dv;
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struct stic_info *px_si;
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volatile u_int32_t *px_qpoll[PX_BUF_COUNT];
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};
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struct cfattach px_ca = {
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sizeof(struct px_softc), px_match, px_attach
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};
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int
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px_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct tc_attach_args *ta;
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ta = aux;
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return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0);
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}
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void
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px_attach(struct device *parent, struct device *self, void *aux)
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{
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struct stic_info *si;
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struct tc_attach_args *ta;
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struct px_softc *px;
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int console, i;
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u_long v;
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px = (struct px_softc *)self;
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ta = (struct tc_attach_args *)aux;
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if (ta->ta_addr == stic_consinfo.si_slotbase) {
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si = &stic_consinfo;
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console = 1;
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} else {
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if (stic_consinfo.si_slotbase == NULL)
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si = &stic_consinfo;
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else {
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si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO);
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}
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si->si_slotbase = ta->ta_addr;
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px_init(si, 0);
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console = 0;
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}
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px->px_si = si;
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si->si_dv = self;
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tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si);
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printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph);
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for (i = 0; i < PX_BUF_COUNT; i++) {
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v = i * STIC_PACKET_SIZE +
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si->si_buf_phys + STIC_XCOMM_SIZE;
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v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
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px->px_qpoll[i] = (volatile u_int32_t *)
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((caddr_t)si->si_slotbase + (v >> 9));
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}
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stic_attach(self, si, console);
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}
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void
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px_cnattach(tc_addr_t addr)
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{
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struct stic_info *si;
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si = &stic_consinfo;
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si->si_slotbase = addr;
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px_init(si, 1);
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stic_cnattach(si);
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}
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void
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px_init(struct stic_info *si, int bootstrap)
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{
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struct pglist pglist;
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caddr_t kva, bva;
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paddr_t bpa;
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/*
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* Allocate memory for the packet buffers. It must be located below
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* 8MB, since the STIC can't access outside that region. Also, due
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* to the holes in STIC address space, each buffer mustn't cross a
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* 32kB boundary.
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*/
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if (bootstrap) {
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/*
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* UVM won't be initialised at this point, so grab memory
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* directly from vm_physmem[].
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*/
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bva = (caddr_t)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN);
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bpa = (STIC_KSEG_TO_PHYS(kva) + PX_BUF_ALIGN - 1) &
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~(PX_BUF_ALIGN - 1);
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if (bpa + PX_BUF_SIZE > 8192*1024)
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panic("px_init: allocation out of bounds");
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} else {
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if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN,
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0, &pglist, 1, 0) != 0)
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panic("px_init: allocation failure");
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bpa = TAILQ_FIRST(&pglist)->phys_addr;
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}
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kva = (caddr_t)si->si_slotbase;
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si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET);
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si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET);
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si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET);
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si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET);
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si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa);
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si->si_buf_phys = bpa;
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si->si_buf_size = PX_BUF_SIZE;
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si->si_disptype = WSDISPLAY_TYPE_PX;
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si->si_depth = 8;
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si->si_sxc = (volatile struct stic_xcomm *)si->si_buf;
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si->si_pbuf_get = px_pbuf_get;
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si->si_pbuf_post = px_pbuf_post;
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si->si_ioctl = px_ioctl;
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memset(si->si_buf, 0, PX_BUF_SIZE);
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stic_init(si);
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}
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int
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px_intr(void *cookie)
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{
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volatile struct stic_regs *sr;
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volatile struct stic_xcomm *sxc;
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struct stic_info *si;
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struct px_softc *px;
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int state;
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si = cookie;
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px = (struct px_softc *)si->si_dv;
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sr = si->si_stic;
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state = sr->sr_ipdvint;
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sxc = si->si_sxc;
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/*
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* Vertical-retrace condition.
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*
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* Clear the flag and flush out any waiting VDAC updates. We do
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* this at retrace time to avoid producing `shearing' and other
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* nasty artifacts.
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*/
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if ((state & STIC_INT_V) != 0) {
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sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN;
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tc_wmb();
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stic_flush(si);
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}
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/*
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* Error condition.
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*
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* Simply clear the flag and report the error.
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*/
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if ((state & STIC_INT_E) != 0) {
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printf("%s: error intr, %x %x %x %x %x", px->px_dv.dv_xname,
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sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr,
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sr->sr_busadr, sr->sr_busdat);
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sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN;
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tc_wmb();
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}
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/*
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* Check for queue stalls.
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*/
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if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy)
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state |= STIC_INT_P;
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/*
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* Packet-done condition.
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*
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* If packet queueing is enabled, clear the condition, and increment
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* the tail (submitted) pointer.
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*/
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if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) {
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sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
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tc_wmb();
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if (sxc->sxc_tail != sxc->sxc_head) {
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sxc->sxc_done[sxc->sxc_tail] = 0;
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sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail);
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}
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if (sxc->sxc_tail != sxc->sxc_head) {
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if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) {
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sxc->sxc_nreject++;
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sxc->sxc_busy = 0;
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} else
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sxc->sxc_busy = 1;
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} else
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sxc->sxc_busy = 0;
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}
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if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0)
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printf("px_intr: STIC_INT_P_EN == 0\n");
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return (1);
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}
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u_int32_t *
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px_pbuf_get(struct stic_info *si)
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{
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u_long off;
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si->si_pbuf_select ^= STIC_PACKET_SIZE;
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off = si->si_pbuf_select + STIC_XCOMM_SIZE;
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return ((u_int32_t *)((caddr_t)si->si_buf + off));
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}
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int
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px_pbuf_post(struct stic_info *si, u_int32_t *buf)
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{
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volatile u_int32_t *poll, junk;
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volatile struct stic_regs *sr;
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u_long v;
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int c;
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sr = si->si_stic;
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/* Get address of poll register for this buffer. */
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v = (u_long)STIC_KSEG_TO_PHYS(buf);
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v = ((v & 0xffff8000) << 3) | (v & 0x7fff);
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poll = (volatile u_int32_t *)((caddr_t)si->si_slotbase + (v >> 9));
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/*
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* Read the poll register and make sure the stamp wants to accept
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* our packet. This read will initiate the DMA. Don't wait for
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* ever, just in case something's wrong.
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*/
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tc_mb();
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for (c = STAMP_RETRIES; c != 0; c--) {
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if ((sr->sr_ipdvint & STIC_INT_P) != 0) {
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sr->sr_ipdvint = STIC_INT_P_WE;
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tc_wmb();
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junk = *poll;
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return (0);
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}
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DELAY(STAMP_DELAY);
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}
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/* STIC has lost the plot, punish it. */
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stic_reset(si);
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return (-1);
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}
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int
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px_ioctl(struct stic_info *si, u_long cmd, caddr_t data, int flag,
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struct proc *p)
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{
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volatile struct stic_xcomm *sxc;
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volatile struct stic_regs *sr;
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struct stic_xinfo *sxi;
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int rv, s;
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sr = si->si_stic;
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switch (cmd) {
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case STICIO_STARTQ:
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if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED ||
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(si->si_hwflags & PXF_QUEUE) != 0) {
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rv = EBUSY;
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break;
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}
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sxc = si->si_sxc;
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memset((void *)sxc->sxc_done, 0, sizeof(sxc->sxc_done));
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sxc->sxc_head = 0;
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sxc->sxc_tail = 0;
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sxc->sxc_nreject = 0;
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sxc->sxc_nstall = 0;
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s = spltty();
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si->si_hwflags |= PXF_QUEUE;
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sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN;
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tc_wmb();
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splx(s);
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rv = 0;
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break;
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case STICIO_STOPQ:
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s = spltty();
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si->si_hwflags &= ~PXF_QUEUE;
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sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P;
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tc_wmb();
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splx(s);
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rv = 0;
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break;
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case STICIO_GXINFO:
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sxi = (struct stic_xinfo *)data;
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sxi->sxi_unit = si->si_unit;
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sxi->sxi_stampw = si->si_stampw;
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sxi->sxi_stamph = si->si_stamph;
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sxi->sxi_buf_size = si->si_buf_size;
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sxi->sxi_buf_phys = (u_int)si->si_buf_phys;
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sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE;
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sxi->sxi_buf_pktcnt = PX_BUF_COUNT;
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sxi->sxi_buf_imgoff =
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STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT;
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rv = 0;
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break;
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default:
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rv = EPASSTHROUGH;
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break;
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}
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return (rv);
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}
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