240 lines
5.8 KiB
C
240 lines
5.8 KiB
C
/* $NetBSD: lca.c,v 1.15 1996/12/08 00:22:16 cgd Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Authors: Jeffrey Hsu and Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/autoconf.h>
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#include <machine/rpb.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/lcareg.h>
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#include <alpha/pci/lcavar.h>
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#if defined(DEC_AXPPCI_33)
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#include <alpha/pci/pci_axppci_33.h>
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#endif
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int lcamatch __P((struct device *, struct cfdata *, void *));
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void lcaattach __P((struct device *, struct device *, void *));
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struct cfattach lca_ca = {
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sizeof(struct lca_softc), lcamatch, lcaattach,
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};
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struct cfdriver lca_cd = {
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NULL, "lca", DV_DULL,
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};
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static int lcaprint __P((void *, const char *pnp));
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/* There can be only one. */
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int lcafound;
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struct lca_config lca_configuration;
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int
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lcamatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct confargs *ca = aux;
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/* Make sure that we're looking for a LCA. */
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if (strcmp(ca->ca_name, lca_cd.cd_name) != 0)
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return (0);
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if (lcafound)
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return (0);
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return (1);
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}
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/*
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* Set up the chipset's function pointers.
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*/
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void
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lca_init(lcp, mallocsafe)
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struct lca_config *lcp;
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int mallocsafe;
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{
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/*
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* Can't set up SGMAP data here; can be called before malloc().
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*/
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/*
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* The LCA HAE register is WRITE-ONLY, so we can't tell where
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* the second sparse window is actually mapped. Therefore,
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* we have to guess where it is. This seems to be the normal
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* address.
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*/
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lcp->lc_s_mem_w2_masked_base = 0x80000000;
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if (!lcp->lc_initted) {
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/* don't do these twice since they set up extents */
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lcp->lc_iot = lca_bus_io_init(lcp);
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lcp->lc_memt = lca_bus_mem_init(lcp);
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}
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lcp->lc_mallocsafe = mallocsafe;
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lca_pci_init(&lcp->lc_pc, lcp);
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/*
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* Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
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* Hardware Reference Manual''.
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* ...
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*/
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/*
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* According to section 6.4.1, all bits of the IOC_HAE register are
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* undefined after reset. Bits <31:27> are write-only. However, we
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* cannot blindly set it to zero. The serial ROM code that initializes
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* the PCI devices' address spaces, allocates sparse memory blocks in
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* the range that must use the IOC_HAE register for address translation,
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* and sets this register accordingly (see section 6.4.14).
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*
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* IOC_HAE left AS IS.
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*/
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/* According to section 6.4.2, all bits of the IOC_CONF register are
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* undefined after reset. Bits <1:0> are write-only. Set them to
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* 0x00 for PCI Type 0 configuration access.
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*
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* IOC_CONF set to ZERO.
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*/
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REGVAL(LCA_IOC_CONF) = 0;
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/* Turn off DMA window enables in Window Base Registers */
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/* REGVAL(LCA_IOC_W_BASE0) = 0;
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REGVAL(LCA_IOC_W_BASE1) = 0; */
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alpha_mb();
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/* XXX XXX BEGIN XXX XXX */
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{ /* XXX */
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extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */
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alpha_XXX_dmamap_or = 0x40000000; /* XXX */
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} /* XXX */
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/* XXX XXX END XXX XXX */
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lcp->lc_initted = 1;
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}
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#ifdef notdef
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void
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lca_init_sgmap(lcp)
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struct lca_config *lcp;
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{
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/* XXX */
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lcp->lc_sgmap = malloc(1024 * 8, M_DEVBUF, M_WAITOK);
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bzero(lcp->lc_sgmap, 1024 * 8); /* clear all entries. */
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REGVAL(LCA_IOC_W_BASE0) = 0;
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alpha_mb();
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/* Set up Translated Base Register 1; translate to sybBus addr 0. */
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/* check size against APEC XXX JH */
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REGVAL(LCA_IOC_T_BASE_0) = vtophys(lcp->lc_sgmap) >> 1;
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/* Set up PCI mask register 1; map 8MB space. */
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REGVAL(LCA_IOC_W_MASK0) = 0x00700000;
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/* Enable window 1; from PCI address 8MB, direct mapped. */
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REGVAL(LCA_IOC_W_BASE0) = 0x300800000;
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alpha_mb();
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}
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#endif
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void
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lcaattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct lca_softc *sc = (struct lca_softc *)self;
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struct lca_config *lcp;
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struct pcibus_attach_args pba;
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/* note that we've attached the chipset; can't have 2 LCAs. */
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/* Um, not sure about this. XXX JH */
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lcafound = 1;
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/*
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* set up the chipset's info; done once at console init time
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* (maybe), but doesn't hurt to do twice.
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*/
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lcp = sc->sc_lcp = &lca_configuration;
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lca_init(lcp, 1);
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#ifdef notdef
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lca_init_sgmap(lcp);
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#endif
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/* XXX print chipset information */
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printf("\n");
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switch (hwrpb->rpb_type) {
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#if defined(DEC_AXPPCI_33)
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case ST_DEC_AXPPCI_33:
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pci_axppci_33_pickintr(lcp);
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break;
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#endif
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default:
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panic("lcaattach: shouldn't be here, really...");
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}
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pba.pba_busname = "pci";
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pba.pba_iot = lcp->lc_iot;
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pba.pba_memt = lcp->lc_memt;
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pba.pba_pc = &lcp->lc_pc;
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pba.pba_bus = 0;
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config_found(self, &pba, lcaprint);
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}
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static int
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lcaprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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register struct pcibus_attach_args *pba = aux;
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/* only PCIs can attach to LCAes; easy. */
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if (pnp)
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printf("%s at %s", pba->pba_busname, pnp);
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printf(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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