404 lines
13 KiB
C
404 lines
13 KiB
C
#ifndef _GRF_RTREG_H
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#define _GRF_RTREG_H
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/* NOTE: this driver for the MacroSystem Retina board was only possible,
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because MacroSystem provided information about the pecularities
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of the board. THANKS! Competition in Europe among gfx board
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manufacturers is rather tough, so Lutz Vieweg, who wrote the
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initial driver, has made an agreement with MS not to document
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the driver source (see also his Copyright disclaimer at the
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beginning of grf_rt.cc and ite_rt.cc).
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-> ALL comments and register defines after
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-> "/* -------------- START OF CODE -------------- * /"
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-> have been added by myself (mw) from studying the publically
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-> available "NCR 77C22E+" Data Manual
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Lutz' original driver source (without any of my comments) is
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available on request. */
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#if 0
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/* these are in dev/devices.h */
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/* definitions to find the autoconfig-board under
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AmigaDOS */
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#define RETINA_MANUFACTURER 0x4754
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#define RETINA_PRODUCT 6
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#define RETINA_SERIALNUMBER 1
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#endif
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/*
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For more information on the structure entries take a look at
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grf_rt.cc and ite_rt.cc.
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*/
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struct MonDef {
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/* first the general monitor characteristics */
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unsigned long FQ;
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unsigned char FLG;
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unsigned short MW; /* screen width in pixels */
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unsigned short MH; /* screen height in pixels */
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unsigned short HBS;
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unsigned short HSS;
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unsigned short HSE;
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unsigned short HBE;
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unsigned short HT;
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unsigned short VBS;
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unsigned short VSS;
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unsigned short VSE;
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unsigned short VBE;
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unsigned short VT;
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unsigned short DEP; /* Color-depth, 4 for text-mode */
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/* values != 4 currently not supported */
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unsigned char * PAL; /* points to n*3 byte RGB-palette data */
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/* n=16 for the text-mode */
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/* all following entries are text-specific in
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any way. Make sure your monitor
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parameters are calculated for the
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appropriate font width and height!
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*/
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unsigned short TX; /* screen-width in characters */
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/* currently, TX has to be a */
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/* multiple of 16! */
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unsigned short TY; /* screen-height in characters */
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unsigned short XY; /* TX*TY (speeds up some calcs.) */
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unsigned short FX; /* font-width (valid values: 4,7-16) */
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unsigned short FY; /* font-height (valid range: 1-32) */
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unsigned char * FData; /* pointer to the font-data */
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/* The font data is simply an array of bytes defining
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the chars in ascending order, line by line. If your
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font is wider than 8 pixel, FData has to be an
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array of words. */
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unsigned short FLo; /* lowest character defined */
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unsigned short FHi; /* highest char. defined */
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};
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#if 0
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/* Some ready-made MonDef structures are available in grf_rt.cc */
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extern struct MonDef MON_640_512_60;
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extern struct MonDef MON_768_600_60;
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extern struct MonDef MON_768_600_80;
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/* text-screen resolutions wider than 1024 are currently damaged.
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The VRAM access seems to become unstable at higher resolutions.
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This may hopefully be subject of change.
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*/
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extern struct MonDef MON_1024_768_80;
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extern struct MonDef MON_1024_1024_59;
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/* WARNING: THE FOLLOWING MONITOR MODES EXCEED THE 90-MHz LIMIT THE PROCESSOR
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HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
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MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */
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extern struct MonDef MON_1280_1024_60;
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extern struct MonDef MON_1280_1024_69;
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/* Default monitor (change if this is too much for your monitor :-)) */
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#define DEFAULT_MONDEF MON_768_600_80
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#else
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/* nothing exported for now... */
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#endif
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/* a standard 16-color palette is available in grf_rt.cc
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and used by the standard monitor-definitions above */
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extern unsigned char NCRStdPalette[];
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/* The prototypes for C
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with a little explanation
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unsigned char * InitNCR(volatile void * BoardAdress, struct MonDef * md = &MON_640_512_60);
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This routine initialises the Retina hardware, opens a
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text-mode screen, and sets the cursor to position 0.
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The routine returns 0 if it was unable to open the screen,
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or an unsigned char * to the display/attribute memory
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when it succeeded. The organisation of the display memory
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is a little strange (Intel-typically...) :
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Byte 00 01 02 03 04 05 06 etc.
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Char0 Attr0 -- -- Char1 Attr1 -- etc.
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You may set a character and its associated attribute byte
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with a single word-access, or you may perform to byte writes
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for the char and attribute. Each 2. word has no meaning,
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and writes to theese locations are ignored.
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The attribute byte for each character has the following
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structure:
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Bit 7 6 5 4 3 2 1 0
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BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0
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Were FORE is the foreground-color index (0-15) and
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BACK is the background color index (0-7). BLINK
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enables blinking for the associated character.
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The higher 8 colors in the standard palette are
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lighter than the lower 8, so you may see FORE3 as
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an intensity bit. If FORE == 1 or FORE == 9 and
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BACK == 0 the character is underlined. Since I don't
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think this looks good, it will probably change in a
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future release.
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There's no routine "SetChar" or "SetAttr" provided,
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because I think it's so trivial... a function call
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would be pure overhead. As an example, a routine
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to set the char code and attribute at position x,y:
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(assumed the value returned by InitNCR was stored
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into "DispMem", the actual MonDef struct * is hold
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in "MDef")
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void SetChar(unsigned char chr, unsigned char attr,
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unsigned short x, unsigned short y) {
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unsigned struct MonDef * md = MDef;
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unsigned char * c = DispMem + x*4 + y*md->TX*4;
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*c++ = chr;
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*c++ = attr;
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}
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Currently, InitNCR() disables the Retina VBLANK IRQ,
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but beware: When running the Retina WB-Emu under
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AmigaDOS, the VBLANK IRQ is ENABLED.
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void SetCursorPos(unsigned short pos);
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This routine sets the hardware-cursor position
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to the screen location pos. pos can be calculated
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as (x + y * md->TY).
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void ScreenUp(void);
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A somewhat optimized routine that scrolls the whole
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screen up one row. A good idea to compile this piece
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of code with optimization enabled.
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void ScreenDown(void);
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A somewhat optimized routine that scrolls the whole
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screen down one row. A good idea to compile this piece
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of code with optimization enabled.
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*/
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/* -------------- START OF CODE -------------- */
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/* read VGA register */
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#define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg))
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/* write VGA register */
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#define vgaw(ba, reg, val) \
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*(((volatile unsigned char *)ba)+reg) = val
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/* defines for the used register addresses (mw)
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NOTE: there are some registers that have different addresses when
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in mono or color mode. We only support color mode, and thus
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some addresses won't work in mono-mode! */
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/* General Registers: */
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#define GREG_STATUS0_R 0x43C2
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#define GREG_STATUS1_R 0x43DA
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#define GREG_MISC_OUTPUT_R 0x43CC
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#define GREG_MISC_OUTPUT_W 0x43C2
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#define GREG_FEATURE_CONTROL_R 0x43CA
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#define GREG_FEATURE_CONTROL_W 0x43DA
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#define GREG_POS 0x4102
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/* Attribute Controller: */
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#define ACT_ADDRESS 0x43C0
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#define ACT_ADDRESS_R 0x03C0
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#define ACT_ADDRESS_W 0x43C0
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#define ACT_ID_PALETTE0 0x00
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#define ACT_ID_PALETTE1 0x01
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#define ACT_ID_PALETTE2 0x02
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#define ACT_ID_PALETTE3 0x03
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#define ACT_ID_PALETTE4 0x04
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#define ACT_ID_PALETTE5 0x05
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#define ACT_ID_PALETTE6 0x06
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#define ACT_ID_PALETTE7 0x07
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#define ACT_ID_PALETTE8 0x08
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#define ACT_ID_PALETTE9 0x09
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#define ACT_ID_PALETTE10 0x0A
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#define ACT_ID_PALETTE11 0x0B
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#define ACT_ID_PALETTE12 0x0C
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#define ACT_ID_PALETTE13 0x0D
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#define ACT_ID_PALETTE14 0x0E
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#define ACT_ID_PALETTE15 0x0F
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#define ACT_ID_ATTR_MODE_CNTL 0x10
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#define ACT_ID_OVERSCAN_COLOR 0x11
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#define ACT_ID_COLOR_PLANE_ENA 0x12
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#define ACT_ID_HOR_PEL_PANNING 0x13
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#define ACT_ID_COLOR_SELECT 0x14
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/* Graphics Controller: */
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#define GCT_ADDRESS 0x43CE
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#define GCT_ADDRESS_R 0x03CE
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#define GCT_ADDRESS_W 0x03CE
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#define GCT_ID_SET_RESET 0x00
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#define GCT_ID_ENABLE_SET_RESET 0x01
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#define GCT_ID_COLOR_COMPARE 0x02
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#define GCT_ID_DATA_ROTATE 0x03
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#define GCT_ID_READ_MAP_SELECT 0x04
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#define GCT_ID_GRAPHICS_MODE 0x05
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#define GCT_ID_MISC 0x06
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#define GCT_ID_COLOR_XCARE 0x07
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#define GCT_ID_BITMASK 0x08
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/* Sequencer: */
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#define SEQ_ADDRESS 0x43C4
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#define SEQ_ADDRESS_R 0x03C4
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#define SEQ_ADDRESS_W 0x03C4
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#define SEQ_ID_RESET 0x00
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#define SEQ_ID_CLOCKING_MODE 0x01
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#define SEQ_ID_MAP_MASK 0x02
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#define SEQ_ID_CHAR_MAP_SELECT 0x03
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#define SEQ_ID_MEMORY_MODE 0x04
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#define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */
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#define SEQ_ID_CHIP_ID 0x08
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#define SEQ_ID_CURSOR_COLOR1 0x0A
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#define SEQ_ID_CURSOR_COLOR0 0x0B
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#define SEQ_ID_CURSOR_CONTROL 0x0C
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#define SEQ_ID_CURSOR_X_LOC_HI 0x0D
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#define SEQ_ID_CURSOR_X_LOC_LO 0x0E
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#define SEQ_ID_CURSOR_Y_LOC_HI 0x0F
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#define SEQ_ID_CURSOR_Y_LOC_LO 0x10
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#define SEQ_ID_CURSOR_X_INDEX 0x11
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#define SEQ_ID_CURSOR_Y_INDEX 0x12
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#define SEQ_ID_CURSOR_STORE_LO 0x14
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#define SEQ_ID_CURSOR_STORE_HI 0x15
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#define SEQ_ID_CURSOR_STORE_MID 0x16
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#define SEQ_ID_CURSOR_PIXELMASK 0x17
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#define SEQ_ID_PRIM_HOST_OFF_HI 0x18
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#define SEQ_ID_PRIM_HOST_OFF_LO 0x19
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#define SEQ_ID_SEC_HOST_OFF_HI 0x1C
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#define SEQ_ID_SEC_HOST_OFF_LO 0x1D
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#define SEQ_ID_EXTENDED_MEM_ENA 0x1E
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#define SEQ_ID_EXT_CLOCK_MODE 0x1F
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#define SEQ_ID_EXT_VIDEO_ADDR 0x20
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#define SEQ_ID_EXT_PIXEL_CNTL 0x21
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#define SEQ_ID_BUS_WIDTH_FEEDB 0x22
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#define SEQ_ID_PERF_SELECT 0x23
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#define SEQ_ID_COLOR_EXP_WFG 0x24
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#define SEQ_ID_COLOR_EXP_WBG 0x25
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#define SEQ_ID_EXT_RW_CONTROL 0x26
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#define SEQ_ID_MISC_FEATURE_SEL 0x27
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#define SEQ_ID_COLOR_KEY_CNTL 0x28
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#define SEQ_ID_COLOR_KEY_MATCH 0x29
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#define SEQ_ID_CRC_CONTROL 0x2D
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#define SEQ_ID_CRC_DATA_LOW 0x2E
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#define SEQ_ID_CRC_DATA_HIGH 0x2F
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/* CRT Controller: */
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#define CRT_ADDRESS 0x43D4
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#define CRT_ADDRESS_R 0x03D4
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#define CRT_ADDRESS_W 0x03D4
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#define CRT_ID_HOR_TOTAL 0x00
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#define CRT_ID_HOR_DISP_ENA_END 0x01
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#define CRT_ID_START_HOR_BLANK 0x02
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#define CRT_ID_END_HOR_BLANK 0x03
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#define CRT_ID_START_HOR_RETR 0x04
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#define CRT_ID_END_HOR_RETR 0x05
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#define CRT_ID_VER_TOTAL 0x06
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#define CRT_ID_OVERFLOW 0x07
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#define CRT_ID_PRESET_ROW_SCAN 0x08
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#define CRT_ID_MAX_SCAN_LINE 0x09
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#define CRT_ID_CURSOR_START 0x0A
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#define CRT_ID_CURSOR_END 0x0B
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#define CRT_ID_START_ADDR_HIGH 0x0C
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#define CRT_ID_START_ADDR_LOW 0x0D
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#define CRT_ID_CURSOR_LOC_HIGH 0x0E
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#define CRT_ID_CURSOR_LOC_LOW 0x0F
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#define CRT_ID_START_VER_RETR 0x10
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#define CRT_ID_END_VER_RETR 0x11
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#define CRT_ID_VER_DISP_ENA_END 0x12
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#define CRT_ID_OFFSET 0x13
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#define CRT_ID_UNDERLINE_LOC 0x14
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#define CRT_ID_START_VER_BLANK 0x15
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#define CRT_ID_END_VER_BLANK 0x16
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#define CRT_ID_MODE_CONTROL 0x17
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#define CRT_ID_LINE_COMPARE 0x18
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#define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */
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#define CRT_ID_EXT_START_ADDR 0x31
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#define CRT_ID_EXT_HOR_TIMING2 0x32
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#define CRT_ID_EXT_VER_TIMING 0x33
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/* Video DAC (these are *pure* guesses from the usage of these registers,
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I don't have a data sheet for this chip:-/) */
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#define VDAC_REG_D 0x800d /* well.. */
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#define VDAC_REG_SELECT 0x8001 /* perhaps.. */
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#define VDAC_REG_DATA 0x8003 /* dito.. */
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#define WGfx(ba, idx, val) \
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vgaw(ba, GCT_ADDRESS, idx);\
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vgaw(ba, GCT_ADDRESS_W , val)\
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#define WSeq(ba, idx, val)\
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vgaw(ba, SEQ_ADDRESS, idx);\
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vgaw(ba, SEQ_ADDRESS_W , val)
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#define WCrt(ba, idx, val)\
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vgaw(ba, CRT_ADDRESS, idx);\
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vgaw(ba, CRT_ADDRESS_W , val)
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#define WAttr(ba, idx, val)\
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vgaw(ba, ACT_ADDRESS, idx);\
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vgaw(ba, ACT_ADDRESS_W, val)
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#define Map(m)\
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WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\
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WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)))\
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static inline unsigned char RAttr(volatile void * ba, short idx) {
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vgaw (ba, ACT_ADDRESS, idx);
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return vgar (ba, ACT_ADDRESS_R);
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}
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static inline unsigned char RSeq(volatile void * ba, short idx) {
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vgaw (ba, SEQ_ADDRESS, idx);
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return vgar (ba, SEQ_ADDRESS_R);
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}
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static inline unsigned char RCrt(volatile void * ba, short idx) {
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vgaw (ba, CRT_ADDRESS, idx);
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return vgar (ba, CRT_ADDRESS_R);
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}
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static inline unsigned char RGfx(volatile void * ba, short idx) {
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vgaw(ba, GCT_ADDRESS, idx);
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return vgar (ba, GCT_ADDRESS_R);
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}
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/* yes I know they don't belong here... */
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struct ite_softc;
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extern void retina_init (struct ite_softc *ip);
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extern void retina_cursor (struct ite_softc *ip, int flag);
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extern void retina_deinit (struct ite_softc *ip);
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extern void retina_putc (struct ite_softc *ip, int c, int dy, int dx, int mode);
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extern void retina_clear (struct ite_softc *ip, int sy, int sx, int h, int w);
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extern void retina_scroll (struct ite_softc *ip, int sy, int sx, int count, int dir);
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#endif /* _GRF_RTREG_H */
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