thorpej 636e9cd08b Add a "cacheline_size" argument to pci_configure_bus(). It is used ... to set the cacheline size in the BHLC register. This should be the size of the largest D-cache line on a system.		2001-11-28 23:48:34 +00:00
..
compile	Fix typo...	2001-09-17 15:57:00 +00:00
conf	cleanup:	2001-11-20 12:56:17 +00:00
dev	Use the Walnut FPGA register offsets instead if the i8042 offsets for	2001-10-29 01:42:11 +00:00
include	MAXSLP is defined to be a machine-independent scheduling parameter,	2001-11-15 18:06:11 +00:00
pci	Overhaul the interrupt system to use hardware interrupts directly.	2001-11-08 23:28:13 +00:00
walnut	Add a "cacheline_size" argument to pci_configure_bus(). It is used	2001-11-28 23:48:34 +00:00
Makefile