63 lines
1.8 KiB
C
63 lines
1.8 KiB
C
/* $NetBSD: if_eireg.h,v 1.1 2000/05/09 21:56:03 bjh21 Exp $ */
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/*
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* 2000 Ben Harris
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*
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* This file is in the public domain.
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*/
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/*
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* if_eireg.h - register definitions etc for the Acorn Ether1 card
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*/
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#ifndef _IF_EIREG_H_
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#define _IF_EIREG_H_
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/*
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* My understanding of this card is as follows. Note that this is
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* mostly derived from reading other people's code, so it may be
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* hideously inaccurate.
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*
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* The card has three address spaces. The ROM is mapped into the
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* bottom n (16?) bytes of SYNC address space, and contains the
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* expansion card ID information and the Ethernet address. There is a
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* (write only?) set of registers at the start of the FAST address
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* space. One of these performs miscellaneous control functions, and
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* the other acts as a page selector for the board memory. The board
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* has 64k of RAM, and 4k pages of this can be mapped at offset 0x2000
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* in the FAST space by writing the page number to the page register.
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* The 82586 has access to the whole of this memory and (I believe)
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* sees it as the top 64k of its address space.
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*/
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/* Registers in the board's control space */
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#define EI_PAGE 0
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#define EI_CONTROL 1
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#define EI_CTL_RESET 0x01
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#define EI_CTL_LOOP 0x02
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#define EI_CTL_ATTN 0x04
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#define EI_CTL_CLI 0x08
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/* Offset of base of memory in bus_space */
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#define EI_MEMOFF 0x800
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/*
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* All addresses within board RAM are in bytes of actual RAM. RAM is
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* 16 bis wide, and can only be accessed by word transfers
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* (bus_space_xxx_2).
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*/
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#define EI_MEMSIZE 0x10000
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#define EI_MEMBASE (0x1000000 - EI_MEMSIZE)
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#define EI_PAGESIZE 0x1000
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#define EI_NPAGES (EI_MEMSIZE / EI_PAGESIZE)
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#define ei_atop(a) (((a) % EI_MEMSIZE) / EI_PAGESIZE)
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#define ei_atopo(a) ((a) % EI_PAGESIZE)
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#define EI_SCP_ADDR IE_SCP_ADDR % EI_MEMSIZE
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#define EI_ROMSIZE 16
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#define EI_ROM_HWREV 8
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#define EI_ROM_EADDR 9
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#endif
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