162 lines
4.6 KiB
C
162 lines
4.6 KiB
C
/* $NetBSD: pchb.c,v 1.5 2004/04/23 21:13:06 itojun Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.5 2004/04/23 21:13:06 itojun Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/mpc105reg.h>
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int pchbmatch __P((struct device *, struct cfdata *, void *));
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void pchbattach __P((struct device *, struct device *, void *));
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CFATTACH_DECL(pchb, sizeof(struct device),
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pchbmatch, pchbattach, NULL, NULL);
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int
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pchbmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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/*
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* Match all known PCI host chipsets.
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*/
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_HOST) {
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return (1);
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}
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return (0);
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}
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void
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pchbattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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pcireg_t reg1, reg2;
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char devinfo[256];
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const char *s;
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printf("\n");
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/*
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* All we do is print out a description. Eventually, we
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* might want to add code that does something that's
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* possibly chipset-specific.
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*/
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo,
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PCI_REVISION(pa->pa_class));
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switch (PCI_VENDOR(pa->pa_id)) {
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case PCI_VENDOR_MOT:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_MOT_MPC105:
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reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
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MPC105_PICR1);
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reg2 = pci_conf_read(pa->pa_pc, pa->pa_tag,
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MPC105_PICR2);
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printf("%s: L2 cache: ", self->dv_xname);
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switch (reg2 & MPC105_PICR2_L2_SIZE) {
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case MPC105_PICR2_L2_SIZE_256K:
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s = "256K";
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break;
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case MPC105_PICR2_L2_SIZE_512K:
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s = "512K";
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break;
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case MPC105_PICR2_L2_SIZE_1M:
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s = "1M";
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break;
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default:
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s = "reserved size";
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break;
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}
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printf("%s, ", s);
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switch (reg1 & MPC105_PICR1_L2_MP) {
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case MPC105_PICR1_L2_MP_NONE:
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s = "uniprocessor/none";
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break;
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case MPC105_PICR1_L2_MP_WT:
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s = "write-through";
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break;
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case MPC105_PICR1_L2_MP_WB:
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s = "write-back";
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break;
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case MPC105_PICR1_L2_MP_MP:
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s = "multiprocessor";
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break;
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}
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printf("%s mode\n", s);
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/*
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* Invalidate the L2 cache
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*/
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reg2 &= ~(MPC105_PICR2_L2_UPD_EN | MPC105_PICR2_L2_EN);
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reg2 |= MPC105_PICR2_FLUSH_L2;
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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MPC105_PICR2, reg2);
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/*
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* Now enable it.
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*/
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reg2 &= ~MPC105_PICR2_FLUSH_L2;
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reg2 |= MPC105_PICR2_L2_UPD_EN | MPC105_PICR2_L2_EN;
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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MPC105_PICR2, reg2);
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break;
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}
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}
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}
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