397 lines
8.6 KiB
C
397 lines
8.6 KiB
C
/* $NetBSD: tx39clock.c,v 1.5 2000/01/03 18:24:04 uch Exp $ */
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/*
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* Copyright (c) 1999, 2000 by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include "opt_tx39_debug.h"
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/clock_subr.h>
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#include <machine/bus.h>
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#include <machine/clock_machdep.h>
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#include <machine/cpu.h>
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#include <hpcmips/tx/tx39var.h>
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#include <hpcmips/tx/tx39icureg.h>
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#include <hpcmips/tx/tx39clockvar.h>
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#include <hpcmips/tx/tx39clockreg.h>
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#include <hpcmips/tx/tx39timerreg.h>
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#include <dev/dec/clockvar.h>
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#ifdef TX39CLKDEBUG
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#define DPRINTF(arg) printf arg
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#else
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#define DPRINTF(arg)
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#endif
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#define ISSETPRINT(r, m) __is_set_print(r, TX39_CLOCK_EN##m##CLK, #m)
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void tx39clock_init __P((struct device*));
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void tx39clock_get __P((struct device*, time_t, struct clocktime*));
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void tx39clock_set __P((struct device*, struct clocktime*));
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const struct clockfns tx39clockfns = {
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tx39clock_init, tx39clock_get, tx39clock_set,
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};
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struct txtime {
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u_int32_t t_hi;
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u_int32_t t_lo;
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};
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struct tx39clock_softc {
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struct device sc_dev;
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tx_chipset_tag_t sc_tc;
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int sc_alarm;
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int sc_enabled;
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int sc_year;
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struct clocktime sc_epoch;
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};
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int tx39clock_match __P((struct device*, struct cfdata*, void*));
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void tx39clock_attach __P((struct device*, struct device*, void*));
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void tx39clock_dump __P((tx_chipset_tag_t));
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void tx39clock_cpuspeed __P((int*, int*));
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void __tx39timer_rtcfreeze __P((tx_chipset_tag_t));
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void __tx39timer_rtcreset __P((tx_chipset_tag_t));
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__inline void __tx39timer_rtcget __P((struct txtime*));
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__inline time_t __tx39timer_rtc2sec __P((struct txtime*));
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struct cfattach tx39clock_ca = {
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sizeof(struct tx39clock_softc), tx39clock_match, tx39clock_attach
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};
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int
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tx39clock_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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return 2; /* 1st attach group of txsim */
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}
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void
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tx39clock_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct txsim_attach_args *ta = aux;
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struct tx39clock_softc *sc = (void*)self;
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tx_chipset_tag_t tc;
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txreg_t reg;
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tc = sc->sc_tc = ta->ta_tc;
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tx_conf_register_clock(tc, self);
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/* Reset timer module */
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tx_conf_write(tc, TX39_TIMERCONTROL_REG, 0);
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/* Enable periodic timer */
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reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
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reg |= TX39_TIMERCONTROL_ENPERTIMER;
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tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
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sc->sc_enabled = 0;
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/*
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* RTC and ALARM
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* RTCINT ... INTR5 bit 31 (roll over)
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* ALARMINT ... INTR5 bit 30
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* PERINT ... INTR5 bit 29
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*/
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clockattach(self, &tx39clockfns);
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#ifdef TX39CLKDEBUG
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tx39clock_dump(tc);
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#endif /* TX39CLKDEBUG */
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}
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/*
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* cpuclock ... CPU clock (Hz)
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* cpuspeed ... instructions-per-microsecond
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*/
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void
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tx39clock_cpuspeed(cpuclock, cpuspeed)
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int *cpuclock;
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int *cpuspeed;
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{
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struct txtime t0, t1;
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int elapsed;
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__tx39timer_rtcget(&t0);
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__asm __volatile("
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.set noreorder;
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li $8, 10000000;
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1: nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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add $8, $8, -1;
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bnez $8, 1b;
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nop;
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.set reorder;
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");
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__tx39timer_rtcget(&t1);
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elapsed = t1.t_lo - t0.t_lo;
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*cpuclock = (100000000 / elapsed) * TX39_RTCLOCK;
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*cpuspeed = *cpuclock / 1000000;
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}
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void
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__tx39timer_rtcfreeze(tc)
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tx_chipset_tag_t tc;
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{
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txreg_t reg;
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reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
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/* Freeze RTC */
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reg |= TX39_TIMERCONTROL_FREEZEPRE; /* Upper 8bit */
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reg |= TX39_TIMERCONTROL_FREEZERTC; /* Lower 32bit */
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/* Freeze periodic timer */
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reg |= TX39_TIMERCONTROL_FREEZETIMER;
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reg &= ~TX39_TIMERCONTROL_ENPERTIMER;
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tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
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}
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__inline time_t
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__tx39timer_rtc2sec(t)
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struct txtime *t;
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{
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/* This rely on RTC is 32.768kHz */
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return (t->t_lo >> 15) | (t->t_hi << 17);
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}
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__inline void
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__tx39timer_rtcget(t)
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struct txtime *t;
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{
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tx_chipset_tag_t tc;
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txreg_t reghi, reglo, oreghi, oreglo;
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int retry;
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tc = tx_conf_get_tag();
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retry = 10;
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do {
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oreglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG);
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reglo = tx_conf_read(tc, TX39_TIMERRTCLO_REG);
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oreghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG);
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reghi = tx_conf_read(tc, TX39_TIMERRTCHI_REG);
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} while ((reghi != oreghi || reglo != oreglo) && (--retry > 0));
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if (retry < 0) {
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printf("RTC timer read error.\n");
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}
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t->t_hi = TX39_TIMERRTCHI(reghi);
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t->t_lo = reglo;
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}
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void
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__tx39timer_rtcreset(tc)
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tx_chipset_tag_t tc;
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{
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txreg_t reg;
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reg = tx_conf_read(tc, TX39_TIMERCONTROL_REG);
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/* Reset counter and stop */
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reg |= TX39_TIMERCONTROL_RTCCLR;
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tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
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/* Count again */
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reg &= ~TX39_TIMERCONTROL_RTCCLR;
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tx_conf_write(tc, TX39_TIMERCONTROL_REG, reg);
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}
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void
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tx39clock_init(dev)
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struct device *dev;
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{
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struct tx39clock_softc *sc = (void*)dev;
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tx_chipset_tag_t tc = sc->sc_tc;
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txreg_t reg;
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int pcnt;
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/*
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* Setup periodic timer (interrupting hz times per second.)
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*/
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pcnt = TX39_TIMERCLK / hz - 1;
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reg = tx_conf_read(tc, TX39_TIMERPERIODIC_REG);
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TX39_TIMERPERIODIC_PERVAL_CLR(reg);
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reg = TX39_TIMERPERIODIC_PERVAL_SET(reg, pcnt);
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tx_conf_write(tc, TX39_TIMERPERIODIC_REG, reg);
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/*
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* Enable periodic timer
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*/
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reg = tx_conf_read(tc, TX39_INTRENABLE6_REG);
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reg |= TX39_INTRPRI13_TIMER_PERIODIC_BIT;
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tx_conf_write(tc, TX39_INTRENABLE6_REG, reg);
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/*
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* number of microseconds between interrupts
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*/
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tick = 1000000 / hz;
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}
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void
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tx39clock_get(dev, base, ct)
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struct device *dev;
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time_t base;
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struct clocktime *ct;
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{
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struct clock_ymdhms dt;
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struct tx39clock_softc *sc = (void*)dev;
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struct txtime tt;
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time_t sec;
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__tx39timer_rtcget(&tt);
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sec = __tx39timer_rtc2sec(&tt);
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if (!sc->sc_enabled) {
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DPRINTF(("bootstrap: %d sec from previous reboot\n",
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(int)sec));
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sc->sc_enabled = 1;
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base += sec;
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} else {
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dt.dt_year = sc->sc_year;
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dt.dt_mon = sc->sc_epoch.mon;
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dt.dt_day = sc->sc_epoch.day;
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dt.dt_hour = sc->sc_epoch.hour;
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dt.dt_min = sc->sc_epoch.min;
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dt.dt_sec = sc->sc_epoch.sec;
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dt.dt_wday = sc->sc_epoch.dow;
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base = sec + clock_ymdhms_to_secs(&dt);
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}
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clock_secs_to_ymdhms(base, &dt);
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ct->year = dt.dt_year % 100;
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ct->mon = dt.dt_mon;
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ct->day = dt.dt_day;
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ct->hour = dt.dt_hour;
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ct->min = dt.dt_min;
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ct->sec = dt.dt_sec;
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ct->dow = dt.dt_wday;
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sc->sc_year = dt.dt_year;
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}
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void
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tx39clock_set(dev, ct)
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struct device *dev;
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struct clocktime *ct;
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{
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struct tx39clock_softc *sc = (void*)dev;
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if (sc->sc_enabled) {
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sc->sc_epoch = *ct;
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/* Reset RTC counter */
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__tx39timer_rtcreset(sc->sc_tc);
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}
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}
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int
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tx39clock_alarm_set(tc, msec)
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tx_chipset_tag_t tc;
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int msec;
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{
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struct tx39clock_softc *sc = tc->tc_clockt;
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sc->sc_alarm = TX39_MSEC2RTC(msec);
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tx39clock_alarm_refill(tc);
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return 0;
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}
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void
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tx39clock_alarm_refill(tc)
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tx_chipset_tag_t tc;
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{
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struct tx39clock_softc *sc = tc->tc_clockt;
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struct txtime t;
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__tx39timer_rtcget(&t);
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tx_conf_write(tc, TX39_TIMERALARMHI_REG, t.t_hi); /* XXX */
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tx_conf_write(tc, TX39_TIMERALARMLO_REG, t.t_lo + sc->sc_alarm);
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}
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void
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tx39clock_dump(tc)
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tx_chipset_tag_t tc;
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{
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txreg_t reg;
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reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
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printf(" ");
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ISSETPRINT(reg, CHIM);
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#ifdef TX391X
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ISSETPRINT(reg, VID);
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ISSETPRINT(reg, MBUS);
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#endif /* TX391X */
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#ifdef TX392X
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ISSETPRINT(reg, IRDA);
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#endif /* TX392X */
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ISSETPRINT(reg, SPI);
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ISSETPRINT(reg, TIMER);
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ISSETPRINT(reg, FASTTIMER);
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#ifdef TX392X
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ISSETPRINT(reg, C48MOUT);
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#endif /* TX392X */
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ISSETPRINT(reg, SIBM);
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ISSETPRINT(reg, CSER);
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ISSETPRINT(reg, IR);
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ISSETPRINT(reg, UARTA);
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ISSETPRINT(reg, UARTB);
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printf("\n");
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}
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