61 lines
2.3 KiB
Groff
61 lines
2.3 KiB
Groff
.\" $NetBSD: stpcide.4,v 1.8 2009/10/21 00:30:43 snj Exp $
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.\"
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.\" Copyright (c) 2003 Tohru Nishimura.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd October 31, 2003
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.Dt STPCIDE 4
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.Os
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.Sh NAME
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.Nm stpcide
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.Nd STMicroelectronics STPC IDE disk controllers driver
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.Sh SYNOPSIS
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.Cd "stpcide* at pci? dev ? function ? flags 0x0000"
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.Sh DESCRIPTION
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The
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.Nm
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driver supports the STMicroelectronics STPC x86 SoC internal IDE controllers,
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and provides the interface with the hardware for the
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.Xr ata 4
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driver.
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The driver features DMA mode 2 and PIO mode 4 transfer speeds.
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.Pp
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The 0x0002 flag forces the
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.Nm
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driver to disable DMA on chipsets for which DMA would normally be
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enabled.
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This can be used as a debugging aid, or to work around
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problems where the IDE controller is wired up to the system incorrectly.
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.Sh SEE ALSO
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.Xr ata 4 ,
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.Xr atapi 4 ,
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.Xr intro 4 ,
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.Xr pci 4 ,
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.Xr pciide 4 ,
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.Xr wd 4 ,
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.Xr wdc 4
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.Sh BUGS
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The timings used for the DMA and PIO modes are for STPC Atlas and
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its siblings with their PCI clock configured at 33 MHz.
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Other speeds including the STPC Vega Ultra-IDE controller will need
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adjustments.
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