221 lines
7.6 KiB
C
221 lines
7.6 KiB
C
/* $NetBSD: ieee1394reg.h,v 1.5 2000/12/13 11:30:15 enami Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_IEEE1394_IEEE1394REG_H_
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#define _DEV_IEEE1394_IEEE1394REG_H_
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#include <dev/std/ieee1212reg.h>
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/* Transaction Codes (Table 6-9)
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*/
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#define IEEE1394_TCODE_WRITE_REQUEST_QUADLET 0
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#define IEEE1394_TCODE_WRITE_REQUEST_DATABLOCK 1
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#define IEEE1394_TCODE_WRITE_RESPONSE 2
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#define IEEE1394_TCODE_RESERVED_3 3
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#define IEEE1394_TCODE_READ_REQUEST_QUADLET 4
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#define IEEE1394_TCODE_READ_REQUEST_DATABLOCK 5
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#define IEEE1394_TCODE_READ_RESPONSE_QUADLET 6
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#define IEEE1394_TCODE_READ_RESPONSE_DATABLOCK 7
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#define IEEE1394_TCODE_CYCLE_START 0x8
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#define IEEE1394_TCODE_LOCK_REQUEST 9
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#define IEEE1394_TCODE_ISOCHRONOUS_DATA_BLOCK 10
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#define IEEE1394_TCODE_LOCK_RESPONSE 11
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#define IEEE1394_TCODE_RESERVED_12 12
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#define IEEE1394_TCODE_RESERVED_13 13
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#define IEEE1394_TCODE_RESERVED_14 14
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#define IEEE1394_TCODE_RESERVED_15 15
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/* Extended transaction codes (Table 6-10)
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*/
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#define IEEE1394_XTCODE_RESERVED_0 P1212_LOCK_RESERVED_0
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#define IEEE1394_XTCODE_MASK_SWAP P1212_LOCK_MASK_SWAP
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#define IEEE1394_XTCODE_COMPARE_SWAP P1212_LOCK_COMPARE_SWAP
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#define IEEE1394_XTCODE_FETCH_ADD P1212_LOCK_FETCH_ADD
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#define IEEE1394_XTCODE_LITTLE_ADD P1212_LOCK_LITTLE_ADD
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#define IEEE1394_XTCODE_BOUNDED_ADD P1212_LOCK_BOUNDED_ADD
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#define IEEE1394_XTCODE_WRAP_ADD P1212_LOCK_WRAP_ADD
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#define IEEE1394_XTCODE_VENDOR_DEPENDENT P1212_LOCK_VENDOR_DEPENDENT
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/* 0x0008 .. 0xFFFF are reserved.
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*/
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/* Response codes (Table 6-11)
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*/
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#define IEEE1394_RCODE_RESP_COMPLETE 0
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#define IEEE1394_RCODE_RESERVED_1 1
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#define IEEE1394_RCODE_RESERVED_2 2
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#define IEEE1394_RCODE_RESERVED_3 3
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#define IEEE1394_RCODE_RESP_CONFLICT_ERROR 4
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#define IEEE1394_RCODE_RESP_DATA_ERROR 5
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#define IEEE1394_RCODE_RESP_TYPE_ERROR 6
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#define IEEE1394_RCODE_RESP_ADDRESS_ERROR 7
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#define IEEE1394_RCODE_RESERVED_8 8
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#define IEEE1394_RCODE_RESERVED_9 9
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#define IEEE1394_RCODE_RESERVED_10 10
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#define IEEE1394_RCODE_RESERVED_11 11
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#define IEEE1394_RCODE_RESERVED_12 12
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#define IEEE1394_RCODE_RESERVED_13 13
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#define IEEE1394_RCODE_RESERVED_14 14
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#define IEEE1394_RCODE_RESERVED_15 15
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#define IEEE1394_TAG_UNFORMATTED 0
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#define IEEE1394_TAG_RESERVED_1 1
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#define IEEE1394_TAG_RESERVED_2 2
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#define IEEE1394_TAG_RESERVED_3 3
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#define IEEE1394_ACK_RESERVED_0 0
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#define IEEE1394_ACK_COMPLETE 1
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#define IEEE1394_ACK_PENDING 2
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#define IEEE1394_ACK_RESERVED_3 3
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#define IEEE1394_ACK_BUSY_X 4
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#define IEEE1394_ACK_BUSY_A 5
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#define IEEE1394_ACK_BUSY_B 6
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#define IEEE1394_ACK_RESERVED_7 7
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#define IEEE1394_ACK_RESERVED_8 8
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#define IEEE1394_ACK_RESERVED_9 9
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#define IEEE1394_ACK_RESERVED_10 10
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#define IEEE1394_ACK_RESERVED_11 11
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#define IEEE1394_ACK_RESERVED_12 12
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#define IEEE1394_ACK_DATA_ERROR 13
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#define IEEE1394_ACK_TYPE_ERROR 14
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#define IEEE1394_ACK_RESERVED_15 15
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/* Defined IEEE 1394 speeds.
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*/
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#define IEEE1394_SPD_S100 0 /* 1394-1995 */
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#define IEEE1394_SPD_S200 1 /* 1394-1995 */
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#define IEEE1394_SPD_S400 2 /* 1394-1995 */
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#define IEEE1394_SPD_S800 3 /* 1394b */
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#define IEEE1394_SPD_S1600 4 /* 1394b */
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#define IEEE1394_SPD_S3200 5 /* 1394b */
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#define IEEE1394_SPD_MAX 6
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#define IEEE1394_SPD_STRINGS "100Mb/s", "200Mb/s", "400Mb/s", "800Mb/s", \
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"1.6Gb/s", "3.2Gb/s"
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#if 0
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struct ieee1394_async_nodata {
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u_int32_t an_header_crc;
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} __attribute((__packed__));
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#endif
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#define IEEE1394_BCAST_PHY_ID 0x3f
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/*
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* Transaction code
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*/
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#define IEEE1394_TCODE_WRITE_REQ_QUAD 0x0
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#define IEEE1394_TCODE_WRITE_REQ_BLOCK 0x1
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#define IEEE1394_TCODE_WRITE_RESP 0x2
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#define IEEE1394_TCODE_READ_REQ_QUAD 0x4
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#define IEEE1394_TCODE_READ_REQ_BLOCK 0x5
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#define IEEE1394_TCODE_READ_RESP_QUAD 0x6
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#define IEEE1394_TCODE_READ_RESP_BLOCK 0x7
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#define IEEE1394_TCODE_CYCLE_START 0x8
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#define IEEE1394_TCODE_LOCK_REQ 0x9
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#define IEEE1394_TCODE_STREAM_DATA 0xa
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#define IEEE1394_TCODE_LOCK_RESP 0xb
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/*
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* Response code
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*/
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#define IEEE1394_RCODE_COMPLETE 0x0
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#define IEEE1394_RCODE_CONFLICT_ERROR 0x4
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#define IEEE1394_RCODE_DATA_ERROR 0x5
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#define IEEE1394_RCODE_TYPE_ERROR 0x6
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#define IEEE1394_RCODE_ADDRESS_ERROR 0x7
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/*
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* Tag value
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*/
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#define IEEE1394_TAG_GASP 0x3
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/*
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* Control and Status Registers (IEEE1212 & IEEE1394)
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*/
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#define CSR_BASE_HI 0x0000ffff
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#define CSR_BASE_LO 0xf0000000
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#define CSR_STATE_CLEAR 0x0000
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#define CSR_STATE_SET 0x0004
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#define CSR_NODE_IDS 0x0008
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#define CSR_RESET_START 0x000c
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#define CSR_INDIRECT_ADDRESS 0x0010
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#define CSR_INDIRECT_DATA 0x0014
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#define CSR_SPLIT_TIMEOUT_HI 0x0018
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#define CSR_SPLIT_TIMEOUT_LO 0x001c
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#define CSR_ARGUMENT_HI 0x0020
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#define CSR_ARGUMENT_LO 0x0024
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#define CSR_TEST_START 0x0028
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#define CSR_TEST_STATUS 0x002c
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#define CSR_INTERRUPT_TARGET 0x0050
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#define CSR_INTERRUPT_MASK 0x0054
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#define CSR_CLOCK_VALUE 0x0058
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#define CSR_CLOCK_PERIOD 0x005c
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#define CSR_CLOCK_STROBE_ARRIVED 0x0060
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#define CSR_CLOCK_INFO 0x0064
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#define CSR_MESSAGE_REQUEST 0x0080
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#define CSR_MESSAGE_RESPONSE 0x00c0
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#define CSR_SB_CYCLE_TIME 0x0200
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#define CSR_SB_BUS_TIME 0x0204
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#define CSR_SB_POWER_FAIL_IMMINENT 0x0208
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#define CSR_SB_POWER_SOURCE 0x020c
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#define CSR_SB_BUSY_TIMEOUT 0x0210
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#define CSR_SB_PRIORITY_BUDGET_HI 0x0214
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#define CSR_SB_PRIORITY_BUDGET_LO 0x0218
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#define CSR_SB_BUS_MANAGER_ID 0x021c
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#define CSR_SB_BANDWIDTH_AVAILABLE 0x0220
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#define CSR_SB_CHANNEL_AVAILABLE_HI 0x0224
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#define CSR_SB_CHANNEL_AVAILABLE_LO 0x0228
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#define CSR_SB_MAINT_CONTROL 0x022c
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#define CSR_SB_MAINT_UTILITY 0x0230
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#define CSR_SB_BROADCAST_CHANNEL 0x0234
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#define CSR_CONFIG_ROM 0x0400
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#define CSR_SB_OUTPUT_MASTER_PLUG 0x0900
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#define CSR_SB_OUTPUT_PLUG 0x0904
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#define CSR_SB_INPUT_MASTER_PLUG 0x0980
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#define CSR_SB_INPUT_PLUG 0x0984
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#define CSR_SB_FCP_COMMAND_FRAME 0x0b00
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#define CSR_SB_FCP_RESPONSE_FRAME 0x0d00
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#define CSR_SB_TOPOLOGY_MAP 0x1000
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#define CSR_SB_END 0x1400
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#endif /* _DEV_IEEE1394_IEEE1394REG_H_ */
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