a3d9c9bd87
NetBSD/pmax does not fully utilize the hardware features.
384 lines
9.4 KiB
C
384 lines
9.4 KiB
C
/* $NetBSD: asic.c,v 1.30 1998/09/05 05:54:15 nisimura Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/ioasicvar.h>
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#include <machine/bus.h> /* wbflush() */
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#include <machine/autoconf.h>
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#ifdef alpha
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#include <machine/rpb.h>
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#include <alpha/tc/tc.h>
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#include <alpha/tc/asic.h>
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#endif
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#ifdef pmax
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#include <pmax/pmax/pmaxtype.h>
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#include <pmax/pmax/machdep.h> /* XXX ioasic_init( */
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#include <pmax/pmax/asic.h>
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/maxine.h>
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#include <pmax/pmax/kn03.h>
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#include <pmax/pmax/turbochannel.h> /* interrupt enable declaration */
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/nameglue.h>
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/*
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* Which system models were configured?
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*/
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#include "opt_dec_3max.h"
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#include "opt_dec_3min.h"
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#include "opt_dec_3maxplus.h"
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#include "opt_dec_maxine.h"
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#define C(x) ((void*)(x))
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#define ASIC_NDEVS(x) (sizeof(x)/sizeof(x[0]))
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#define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof ((x)[0]))
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#if defined(DEC_3MAXPLUS) || defined(DEC_3MIN)
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struct ioasicdev_attach_args kn03_ioasic_devs[] = {
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/* 0 */ { "lance", 0x0C0000, 0, C(KN03_LANCE_SLOT) },
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/* 1 */ { "scc", 0x100000, 0, C(KN03_SCC0_SLOT) },
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/* 2 */ { "scc", 0x180000, 0, C(KN03_SCC1_SLOT) },
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/* 3 */ { "mc146818", 0x200000, 0, C(0), },
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/* 4 */ { "asc", 0x300000, 0, C(KN03_SCSI_SLOT) },
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};
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const int nkn03_ioasic_devs = ARRAY_SIZEOF(kn03_ioasic_devs);
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#endif /* DEC_3MAXPLUS || DEC_3MIN */
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#if defined(DEC_MAXINE)
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struct ioasicdev_attach_args xine_ioasic_devs[] = {
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/* 0 */ { "lance", 0x0C0000, 0, C(XINE_LANCE_SLOT), },
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/* 1 */ { "scc", 0x100000, 0, C(XINE_SCC0_SLOT), },
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/* 2 */ { "mc146818", 0x200000, 0, C(0), },
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/* 3 */ { "isdn", 0x240000, 0, C(XINE_ISDN_SLOT), },
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/* 4 */ { "dtop", 0x280000, 0, C(XINE_DTOP_SLOT), },
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/* 5 */ { "fdc", 0x2C0000, 0, C(XINE_FLOPPY_SLOT), },
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/* 6 */ { "asc", 0x300000, 0, C(XINE_SCSI_SLOT), },
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};
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const int nxine_ioasic_devs = ARRAY_SIZEOF(xine_ioasic_devs);
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#endif /* DEC_MAXINE */
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#if defined(DEC_3MAX)
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struct ioasicdev_attach_args kn02_ioasic_devs[] = {
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/* 0 */ { "dc", 0x200000, 0, C(7), },
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/* 0 */ { "mc146818", 0x280000, 0, C(0), },
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};
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const int nkn02_ioasic_devs = ARRAY_SIZEOF(kn02_ioasic_devs);
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#endif /* DEC_3MAX */
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#endif /* pmax */
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struct asic_softc {
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struct device sc_dv;
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tc_addr_t sc_base;
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};
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/* Definition of the driver for autoconfig. */
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int ioasicmatch __P((struct device *, struct cfdata *, void *));
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void ioasicattach __P((struct device *, struct device *, void *));
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int ioasicprint(void *, const char *);
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/* Device locators. */
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#include "locators.h"
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#define ioasiccf_offset cf_loc[IOASICCF_OFFSET] /* offset */
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struct cfattach ioasic_ca = {
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sizeof(struct asic_softc), ioasicmatch, ioasicattach
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};
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void asic_intr_establish __P((struct confargs *, intr_handler_t,
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intr_arg_t));
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void asic_intr_disestablish __P((struct confargs *));
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caddr_t ioasic_cvtaddr __P((struct confargs *));
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int asic_intrnull __P((intr_arg_t));
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struct asic_slot {
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struct confargs as_ca;
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intr_handler_t as_handler;
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void *iada_cookie;
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u_int iada_intrbits;
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};
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#ifdef pmax
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/*#define IOASIC_DEBUG*/
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struct ioasicdev_attach_args *asic_slots;
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extern tc_addr_t ioasic_base;
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tc_addr_t ioasic_base = 0;
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#endif /*pmax*/
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#ifdef IOASIC_DEBUG
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#define IOASIC_DPRINTF(x) printf x
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#else
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#define IOASIC_DPRINTF(x) do { if (0) printf x ; } while (0)
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#endif
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int
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ioasicmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct tc_attach_args *ta = aux;
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IOASIC_DPRINTF(("asicmatch: %s slot %d offset 0x%x pri %d\n",
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ta->ta_modname, ta->ta_slot, ta->ta_offset, (int)ta->ta_cookie));
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/* An IOCTL asic can only occur on the turbochannel, anyway. */
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#ifdef notyet
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if (parent != &tccd)
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return (0);
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#endif
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/*
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* XXX This is wrong.
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*/
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/* The 3MAX (kn02) is special. */
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if (TC_BUS_MATCHNAME(ta, KN02_ASIC_NAME)) {
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#if 0
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printf("(configuring KN02 system slot as asic)\n");
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#endif
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goto gotasic;
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}
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/* Make sure that we're looking for this type of device. */
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if (!TC_BUS_MATCHNAME(ta, "IOCTL "))
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return (0);
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gotasic:
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if (cf->cf_unit > 0)
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return (0);
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return (1);
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}
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void
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ioasicattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct asic_softc *sc = (struct asic_softc *)self;
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struct tc_attach_args *ta = aux;
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struct ioasicdev_attach_args idev;
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int i, nslots;
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/* See if the unit number is valid. */
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switch (systype) {
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#if defined(DEC_3MAXPLUS) || defined(DEC_3MIN)
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case DS_3MIN:
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case DS_3MAXPLUS:
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/* 3min ioasic addressees are the same as 3maxplus. */
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asic_slots = kn03_ioasic_devs;
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nslots = nkn03_ioasic_devs;
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break;
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#endif
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#ifdef DEC_MAXINE
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case DS_MAXINE:
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asic_slots = xine_ioasic_devs;
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nslots = nxine_ioasic_devs;
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break;
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#endif
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#ifdef DEC_3MAX
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case DS_3MAX:
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asic_slots = kn02_ioasic_devs;
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nslots = nkn02_ioasic_devs;
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break;
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#endif
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default:
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panic("ioasicattach: shouldn't be here, really...");
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}
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IOASIC_DPRINTF(("asicattach: %s\n", sc->sc_dv.dv_xname));
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sc->sc_base = ta->ta_addr;
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ioasic_base = sc->sc_base; /* XXX XXX XXX */
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#ifdef pmax
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printf("\n");
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#else /* Alpha AXP: select ASIC speed */
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#ifdef DEC_3000_300
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if (systype == ST_DEC_3000_300) {
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*(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |=
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IOASIC_CSR_FASTMODE;
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MB();
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printf(": slow mode\n");
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} else
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#endif /*DEC_3000_300*/
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printf(": fast mode\n");
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/* Decstations use hand-craft code to enable asic interrupts */
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BUS_INTR_ESTABLISH(ta, asic_intr, sc);
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#endif /* Alpha AXP: select ASIC speed */
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/* The MAXINE has seven pseudo-slots in its system slot */
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#define ASIC_MAX_NSLOTS 7 /*XXX*/
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/* Try to configure each CPU-internal device */
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for (i = 0; i < nslots; i++) {
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IOASIC_DPRINTF(("asicattach: entry %d, base addr %x\n",
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i, sc->sc_base));
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/* Compute address at runtime. Leave table readonly. */
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idev = asic_slots[i];
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idev.iada_addr =((u_long)sc->sc_base) + idev.iada_offset;
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if (idev.iada_modname == NULL || idev.iada_modname[0] == 0)
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break;
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IOASIC_DPRINTF((" adding %s offset %x addr %x\n",
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idev.iada_modname, idev.iada_offset, idev.iada_addr));
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/* Tell the autoconfig machinery we've found the hardware. */
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config_found(self, &idev, ioasicprint);
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}
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IOASIC_DPRINTF(("asicattach: done\n"));
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}
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int
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ioasicprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct ioasicdev_attach_args *d = aux;
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if (pnp)
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printf("%s at %s", d->iada_modname, pnp);
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printf(" offset 0x%x", d->iada_offset);
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printf(" priority %d", (int)d->iada_cookie);
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return (UNCONF);
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}
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int
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ioasic_submatch(match, d)
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struct cfdata *match;
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struct ioasicdev_attach_args *d;
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{
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return ((match->ioasiccf_offset == d->iada_offset) ||
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(match->ioasiccf_offset == IOASICCF_OFFSET_DEFAULT));
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}
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void
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ioasic_intr_establish(dev, cookie, level, handler, val)
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struct device *dev;
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void *cookie;
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tc_intrlevel_t level;
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intr_handler_t handler;
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void *val;
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{
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(*tc_enable_interrupt)((int)cookie, handler, val, 1);
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}
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int
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asic_intrnull(val)
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intr_arg_t val;
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{
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panic("uncaught IOCTL ASIC intr for slot %ld\n", (long)val);
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}
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/* XXX */
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char *
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ioasic_lance_ether_address()
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{
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return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base);
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}
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void
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ioasic_lance_dma_setup(v)
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void *v;
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{
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volatile u_int32_t *ldp;
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tc_addr_t tca;
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tca = (tc_addr_t)v;
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ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base);
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*ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f);
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tc_wmb();
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*(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |=
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IOASIC_CSR_DMAEN_LANCE;
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tc_mb();
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}
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void ioasic_init(int flag);
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/*
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* Initialize the I/O asic
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*/
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void
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ioasic_init(bogus)
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int bogus; /* XXX */
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{
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/* common across 3min, 3maxplus and maxine */
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*(volatile u_int *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
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*(volatile u_int *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
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#if 0
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switch (systype) {
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case DS_3MIN:
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case DS_3MAXPLUS:
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*(volatile u_int *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
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*(volatile u_int *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
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*(volatile u_int *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
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break;
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case DS_MAXINE:
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*(volatile u_int *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
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*(volatile u_int *)(ioasic_base + IOASIC_DTOP_DECODE) = 10;
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*(volatile u_int *)(ioasic_base + IOASIC_FLOPPY_DECODE) = 13;
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*(volatile u_int *)(ioasic_base + IOASIC_CSR) = 0x00001fc1;
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break;
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}
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#endif
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}
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