283 lines
8.5 KiB
C
283 lines
8.5 KiB
C
/* $NetBSD: ralink_wdog.c,v 1.2 2011/07/28 15:38:49 matt Exp $ */
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/*-
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* Copyright (c) 2011 CradlePoint Technology, Inc.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ra_wdog.c -- Ralink 305x Watchdog Timer driver
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*
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* Timer 1 is used as a system reset watchdog timer
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* Timer 0 is (optionally) used as a periodic watchdog service interrupt
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*
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* NetBSD sysmon watchdog is used in mode defined by RA_WDOG_DEFAULT_MODE
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* (which can be set via kernel config), or by mode passed to
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* our 'smw_setmode' function. The mode used determines what
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* mechanism is used to periodically service the watchdog.
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*
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* KTICKLE mode is default and supports 2 variants, allowing some control
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* over the priority of the service routine:
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*
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* 1. the specified reset period is a positive integer:
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* A callout runs the 'smw_tickle' function at IPL_SOFTCLOCK for service.
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* If your system cannot make "forward progress" without softints running,
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* you should use this variant.
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*
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* 2. the specified reset period is a negative integer:
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* Timer 0 interrupt runs ra_wdog_timer0() at IPL_VM for service.
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* If your system can make "forward progress" while spelding long times
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* at IPL_VM, you should use this variant.
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* The numbner is rectified
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*
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* The reset period is defined by RA_WDOG_DEFAULT_PERIOD
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* (which can be set via kernel config), or by period passed to
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* our 'smw_setmode' function. The interrupt service interval
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* is half the reset interval.
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*
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*/
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#include "rwdog.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ralink_wdog.c,v 1.2 2011/07/28 15:38:49 matt Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/wdog.h>
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#include <mips/ralink/ralink_var.h>
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#include <mips/ralink/ralink_reg.h>
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#include <dev/sysmon/sysmonvar.h>
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#if 0
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# define DISABLE_WATCHDOG
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#endif
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#ifndef RA_WDOG_DEFAULT_MODE
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# define RA_WDOG_DEFAULT_MODE WDOG_MODE_KTICKLE
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#endif
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/*
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* PERIODs are in in seconds;
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* the counter is 16-bits;
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* maximum period depends on bus freq
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*/
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#ifndef RA_WDOG_DEFAULT_PERIOD
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# define RA_WDOG_DEFAULT_PERIOD 10
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#endif
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#define WDOG_COUNT_MASK 0xffff
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#define WDOG_MAX_COUNT WDOG_COUNT_MASK
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#define WDOG_MAX_PERIOD \
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(WDOG_MAX_COUNT / (RA_BUS_FREQ / WDOG_MAX_COUNT))
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static int ra_wdog_match(device_t, cfdata_t, void *);
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static void ra_wdog_attach(device_t, device_t, void *);
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static int ra_wdog_tickle(struct sysmon_wdog *);
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static int ra_wdog_timer0(void *);
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static int ra_wdog_setmode(struct sysmon_wdog *);
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extern int sysmon_wdog_setmode(struct sysmon_wdog *, int, u_int);
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typedef struct ra_wdog_softc {
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device_t sc_dev;
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struct sysmon_wdog sc_smw;
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bus_space_tag_t sc_memt;
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bus_space_handle_t sc_memh;
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void *sc_ih;
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} ra_wdog_softc_t;
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CFATTACH_DECL_NEW(rwdog, sizeof(struct ra_wdog_softc),
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ra_wdog_match, ra_wdog_attach, NULL, NULL);
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static const char *wdog_modestr[WDOG_MODE_MASK+1] = {
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[ WDOG_MODE_DISARMED ] = "DISARMED",
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[ WDOG_MODE_KTICKLE ] = "KTICKLE",
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[ WDOG_MODE_UTICKLE ] = "UTICKLE",
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[ WDOG_MODE_ETICKLE ] = "ETICKLE"
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};
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static inline void
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ra_wdog_reset(const ra_wdog_softc_t *sc)
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{
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uint32_t r;
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r = bus_space_read_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT);
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r |= TIMER_1_RESET;
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT, r);
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}
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static inline u_int32_t
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ra_wdog_sec_to_count(u_int nsec)
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{
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KASSERT(nsec <= WDOG_MAX_PERIOD);
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const u_int32_t count = (RA_BUS_FREQ / WDOG_MAX_COUNT) * nsec;
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KASSERT(count <= WDOG_MAX_COUNT);
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return count;
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}
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static int
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ra_wdog_match(device_t parent, cfdata_t cf, void *aux)
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{
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return 1;
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}
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static void
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ra_wdog_attach(device_t parent, device_t self, void *aux)
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{
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ra_wdog_softc_t * const sc = device_private(self);
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const struct mainbus_attach_args *ma = aux;
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bus_space_handle_t memh;
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int error;
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aprint_naive(": Ralink watchdog controller\n");
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aprint_normal(": Ralink watchdog controller\n");
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aprint_normal_dev(self, "max period %d sec.\n", WDOG_MAX_PERIOD);
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error = bus_space_map(ma->ma_memt, RA_TIMER_BASE, 0x100, 0, &memh);
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if (error != 0) {
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aprint_error_dev(self, "unable to map registers, "
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"error=%d\n", error);
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return;
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}
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sc->sc_memt = ma->ma_memt;
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sc->sc_memh = memh;
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sc->sc_smw.smw_name = device_xname(self);
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sc->sc_smw.smw_cookie = sc;
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sc->sc_smw.smw_setmode = ra_wdog_setmode;
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sc->sc_smw.smw_tickle = ra_wdog_tickle;
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sc->sc_smw.smw_period = RA_WDOG_DEFAULT_PERIOD;
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error = sysmon_wdog_register(&sc->sc_smw);
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if (error != 0)
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aprint_error_dev(self, "unable to register with sysmon, "
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"error %d\n", error);
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sc->sc_ih = ra_intr_establish(RA_IRQ_TIMER0, ra_wdog_timer0, sc, 0);
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if (sc->sc_ih == NULL)
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aprint_error_dev(self, "unable to establish interrupt\n");
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/* expect watchdog reset shortly */
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if (RA_WDOG_DEFAULT_MODE == WDOG_MODE_DISARMED) {
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/*
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* disarm the watchdog
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*/
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bus_space_write_4(sc->sc_memt, memh, RA_TIMER_0_CNTRL, 0);
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bus_space_write_4(sc->sc_memt, memh, RA_TIMER_1_CNTRL, 0);
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aprint_normal_dev(self, "%s mode\n",
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wdog_modestr[sc->sc_smw.smw_mode]);
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} else {
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/*
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* initialize and arm the watchdog now.
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* if boot loader already initialized the watchdog
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* then we are re-initializing; this will buy some time
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* until interrupts are enabled, and will establish our
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* (default) mode and smw_period indedpendent of the
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* boot loader.
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*/
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error = sysmon_wdog_setmode(&sc->sc_smw, RA_WDOG_DEFAULT_MODE,
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RA_WDOG_DEFAULT_PERIOD);
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if (error != 0) {
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aprint_error_dev(self, "unable to set sysmon wdog, "
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"mode %d, error %d\n",
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RA_WDOG_DEFAULT_MODE, error);
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} else {
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aprint_normal_dev(self, "%s mode, period %d sec.\n",
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wdog_modestr[sc->sc_smw.smw_mode],
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sc->sc_smw.smw_period);
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}
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}
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}
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/*
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* ra_wdog_tickle - smw watchdog service function
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*/
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static int
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ra_wdog_tickle(struct sysmon_wdog *smw)
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{
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const ra_wdog_softc_t * const sc = smw->smw_cookie;
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ra_wdog_reset(sc);
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return 0;
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}
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/*
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* ra_wdog_timer0 - periodic watchdog service ISR
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*/
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static int
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ra_wdog_timer0(void *arg)
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{
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const ra_wdog_softc_t * const sc = arg;
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ra_wdog_reset(sc);
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return 0;
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}
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static int
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ra_wdog_setmode(struct sysmon_wdog *smw)
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{
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const ra_wdog_softc_t * const sc = smw->smw_cookie;
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u_int period = smw->smw_period;
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bool itickle = false;
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uint32_t r;
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if (((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_KTICKLE) &&
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((int)period < 0)) {
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itickle = true; /* use Timer 0 */
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period = -period;
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}
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/* all configuration has to be done with the timer disabled */
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL, 0);
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL, 0);
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if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED)
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return 0;
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if (period > WDOG_MAX_PERIOD)
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return EOPNOTSUPP;
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/* Set the new watchdog reset period in Timer 1 */
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r = ra_wdog_sec_to_count(period);
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_LOAD, r);
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL,
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TIMER_EN | TIMER_MODE(TIMER_MODE_WDOG) |
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TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
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if (itickle) {
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/* Set the new watchdog service period in Timer 0 */
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r = ra_wdog_sec_to_count(period) / 2;
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_LOAD, r);
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bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL,
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TIMER_EN | TIMER_MODE(TIMER_MODE_PERIODIC) |
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TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
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}
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return 0;
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}
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