NetBSD/sys/dev/marvell
wiz d88f7b1d62 boundary, not boundry. Inspired by Tom Cosgrove. 2003-11-02 10:31:06 +00:00
..
README
files.discovery Add an option to control whether the GT's internal PCI Arbiter should 2003-05-27 11:39:50 +00:00
gt.c add missing __KERNEL_RCSID() 2003-07-14 15:47:00 +00:00
gtbrgreg.h
gtethreg.h
gtidma.c add missing __KERNEL_RCSID() 2003-07-14 15:47:00 +00:00
gtidmareg.h
gtidmavar.h
gtintrreg.h
gtmpsc.c add missing __KERNEL_RCSID() 2003-07-14 15:47:00 +00:00
gtmpscreg.h
gtmpscvar.h
gtpci.c add missing __KERNEL_RCSID() 2003-07-14 15:47:00 +00:00
gtpcireg.h
gtpcivar.h Add basic support for non-PCI host mode. 2003-06-12 19:18:49 +00:00
gtreg.h
gtsdmareg.h boundary, not boundry. Inspired by Tom Cosgrove. 2003-11-02 10:31:06 +00:00
gtvar.h Add basic support for non-PCI host mode. 2003-06-12 19:18:49 +00:00
if_gfe.c Try to drain the Tx pending queues after dealing with Rx/Tx interrupts. 2003-08-05 14:55:06 +00:00
if_gfevar.h Use PAGE_SIZE rather than NBPG. 2003-04-08 23:39:14 +00:00
obio.c add missing __KERNEL_RCSID() 2003-07-14 15:47:00 +00:00

README

External m.d. interface points:

To config, code should configure 'gt' with a struct gtbus_attach_args
filled in.  The code should have already set up the bus_space and
bus_dma tags that are passed in.

m.d. pci_chipset_tag_t should contain at least a copy of the
gtpci_chipset_tag_t data structure.

m.d. code must provide the following functions:

pci_intr_map
pci_intr_string
pci_intr_establish,
pci_intr_disestablish

void *gtmpp_intr_establish(struct gt_softc *gt, int mpp_pin, int ipl,
		     int (*handler)(void *), void *arg);
	Add an interrupt attached to Discovery MPP pin <mpp_pin> at
	the given ipl with the given handler.

void gtmpp_intr_disestablish(struct gt_softc *gt, void *cookie);
	Remove an interrupt attached to Discovery MPP pin.

int gtget_macaddr(struct gt_softc *gt, int function, char *enaddr);
	Get MAC for Discovery ethernet <function>

void intr_enable(void);
	Enable all interrupts (disregarding spls)

void intr_disable(void);
	Disable all interrupts (disregarding spls)