d389b21913
memory test apparently causes hangups on some etherH interfaces. Until this can be debugged with an offending interface the memory test can be bypassed.
1210 lines
28 KiB
C
1210 lines
28 KiB
C
/* $NetBSD: if_eh.c,v 1.4 1996/03/13 20:52:35 mark Exp $ */
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/*
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* Copyright (c) 1995 Melvin Tang-Richardson.
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* All rights reserved.
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*
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* Essential things to do
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* - BPF and multicast support
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* - Testing
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* - 16-bit dma's
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* - Buffer overflow handling (This must be done a certain way) [Nuts]
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* - Enabling card interrupts (Need i cubed info)
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*
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* Other things to do
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* - Pipelined transmitts
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* - Dynamic buffer allocation
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* - Shared RAM if I cubed give me info
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by RiscBSD.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* if_eh.c
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*
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* Ether H driver.
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*/
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/* Some system includes *****************************************************/
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#include <sys/types.h>
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#include <sys/cdefs.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/bootconfig.h>
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/* Hardware related include chip/card/bus ***********************************/
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#include <machine/io.h>
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#include <machine/irqhandler.h>
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#include <machine/katelib.h>
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#include <arm32/podulebus/podulebus.h>
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#include <arm32/podulebus/if_ehreg.h>
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/* Includes for interfacing with the network subsystem **********************/
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/mbuf.h>
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#include <net/if.h>
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#include <net/if_types.h>
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#include <net/if_dl.h>
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#include <net/netisr.h>
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#include <net/route.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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#include <netinet/if_ether.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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/****************************************************************************/
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/* Some useful definitions **************************************************/
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/****************************************************************************/
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#define MY_MANUFACTURER (0x46)
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#define MY_PODULE (0xec)
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#define TXBUF_SIZE (1522)
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#define NTXBUF (1)
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#define RXBUF_SIZE (256)
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#define NRXBUF (26)
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#define ETHER_MIN_LEN (64)
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#define ETHER_MAX_LEN (1522)
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#define PRINTF printf
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/****************************************************************************/
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/* Prototype internal data structures ***************************************/
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/****************************************************************************/
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struct eh_softc {
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/* Kernel interface variables */
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struct device sc_dev;
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int sc_podule_number;
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podule_t *sc_podule;
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irqhandler_t sc_ih;
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/* Network subsystem interface */
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struct arpcom sc_arpcom;
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int promisc;
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/* Driver defined state variables */
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int sc_flags;
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/* Hardware defined state */
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int sc_base;
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int sc_reg;
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int sc_nxtpkt;
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/* Card memory map */
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int sc_physstart;
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int sc_physend;
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int sc_tbs[NTXBUF]; /* Transmit buffer start */
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int sc_rbs;
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int sc_rbd;
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/* Txrx parameters */
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int sc_txcur; /* Fill this buffer next */
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int sc_txlst; /* Buffer in use */
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};
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/* sc_flags */
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#define MODE_MASK (3)
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#define MODE_DEAD (0)
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#define MODE_PIO (1)
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#define MODE_SHRAM (2)
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/****************************************************************************/
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/* Function and data prototypes *********************************************/
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/****************************************************************************/
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int ehprobe __P((struct device *parent, void *match, void *aux));
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void ehattach __P((struct device *parent, struct device *self, void *aux));
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void ehstart __P((struct ifnet *ifp));
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int ehioctl __P((struct ifnet *ifp, u_long cmd, caddr_t data));
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void ehwatchdog __P((int unit));
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void eh_stop_controller __P((struct eh_softc *sc));
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void eh_start_controller __P((struct eh_softc *sc));
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void eh_transmit_command __P((struct eh_softc *sc));
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int eh_copyin __P((struct eh_softc *sc, int src, char *dest, int len));
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int eh_copyout __P((struct eh_softc *sc, char *src, int dest, int len));
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void ehinit __P((struct eh_softc *sc));
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int ehstop __P((struct eh_softc *sc));
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int ehintr __P((void *arg));
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void eh_shutdown __P((void *arg));
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struct cfdriver ehcd = {
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NULL, "eh", ehprobe, ehattach, DV_DULL,
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sizeof(struct eh_softc), NULL, 0
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};
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/****************************************************************************/
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/* Some useful macros *******************************************************/
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/****************************************************************************/
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#define SetReg(r,v) WriteWord ( sc->sc_reg+(r), (v)|((v)<<16) )
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#define GetReg(r) ReadByte ( sc->sc_reg+(r) )
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#define PAGE(n) SetReg ( EH_COMMAND, \
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((GetReg(EH_COMMAND)&COM_MASK_PAGE)|(n<<6)) )
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/* When initiating a remote dma, reset the TXP bit. This Does Not abort */
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/* the transmit, but allows us overlap this remote dma */
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#define REMOTE_DMA(n) SetReg ( EH_COMMAND, \
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((GetReg(EH_COMMAND)&(COM_MASK_DMA))|n) )
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extern char *boot_args;
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char *strstr __P((char */*s1*/, char */*s2*/));
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/****************************************************************************/
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/* Bus attachment code ******************************************************/
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/****************************************************************************/
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int
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ehprobe(parent, match, aux)
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struct device *parent;
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void *match;
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void *aux;
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{
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struct eh_softc *sc = (void *) match;
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struct podule_attach_args *pa = (void *) aux;
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int counter;
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int temp;
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int podule;
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podule = findpodule(MY_MANUFACTURER, MY_PODULE, pa->pa_podule_number);
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if (podule == -1)
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return 0;
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/* Start to fill in the softc with the trivial variables */
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sc->sc_flags = MODE_PIO; /* Select pio mode until I get info from i^3 */
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sc->sc_base = podules[podule].fast_base;
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sc->sc_reg = sc->sc_base + 0x800;
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/* The probe could be tidied up a little */
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/* Reset the card */
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SetReg(EH_RESET, 0xff);
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delay(10000);
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/* Explicitly abort remote DMA, mainly to set a legal state */
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PAGE(0);
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eh_stop_controller(sc);
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SetReg(EH_COMMAND, 0x20); /* This is wrong */
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SetReg(EH_ISR, 0xf ); /* Clear any previous work */
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temp = GetReg(EH_CONFIGA);
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temp = GetReg(EH_CONFIGA);
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temp &= ~0x38;
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SetReg(EH_CONFIGA, temp | 3<<3);
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temp = GetReg(EH_CONFIGA);
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temp = GetReg(EH_CONFIGA);
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/* Make the thing interrupt and test it */
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eh_start_controller(sc);
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/* Temporary initialisation, to allow a transmit test */
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SetReg(EH_PSTART, 16384 >> 8);
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SetReg(EH_PSTOP, 16896 >> 8);
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SetReg(EH_BNRY, 16384 >> 8);
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SetReg(EH_TCR, TCR_NORMALLOOP); /* Erk!! No, put us in loopback */
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SetReg(EH_DCR, DCR_WTS|DCR_LS|DCR_LAS);
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SetReg(EH_RCR, 0);
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/* Transmit some garbage into the loopback */
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SetReg(EH_TPSR, 0x5000);
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SetReg(EH_TBCR0, 0);
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SetReg(EH_TBCR1, 3);
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eh_transmit_command(sc);
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/* The card shouldn't be this quick, so use it as a test */
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if ((GetReg(EH_TSR)&TSR_DONE) != 0)
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PRINTF("eh: Card responded rather quickly %02x\n", GetReg(EH_TSR));
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for (counter=500; counter>0; counter--) {
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if ((GetReg(EH_TSR)&TSR_DONE) != 0)
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break;
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delay(500);
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}
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if (counter == 0) {
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PRINTF("eh: card did not respond\n");
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return 0;
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}
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/* Let it sleep since we're not doing anything with it for now */
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SetReg(EH_ISR, 0);
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SetReg(EH_DCR, DCR_WTS|DCR_LS|DCR_LAS);
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/* Test the board ram. This code will change */
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/*
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* Due to problems with some ether H cards the boot option ehbug
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* can be used to skip this test.
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* If you system hangs during the eh probe try this option.
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*/
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#define NLEN (0x2000)
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#define NBASE (0x4000)
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if (boot_args) {
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char *ptr;
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ptr = strstr(boot_args, "ehbug");
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if (!ptr) {
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char *test_data;
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char *read_buffer;
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MALLOC(test_data, char *, NLEN, M_TEMP, M_NOWAIT);
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if (test_data == NULL)
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panic("Cannot allocate temporary memory for buffer test (1)\n");
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MALLOC(read_buffer, char *, NLEN, M_TEMP, M_NOWAIT);
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if (read_buffer == NULL)
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panic("Cannot allocate temporary memory for buffer test (1)\n");
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printf("1.");
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/* Fill the test_data block */
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for (counter=0; counter<NLEN; counter++) {
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test_data[counter] = (char)(counter&0xff);
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if (test_data[counter] == 0)
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test_data[counter]=0x23;
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}
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printf("2.");
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eh_copyout(sc, test_data, NBASE, NLEN);
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printf("3.");
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delay(10000);
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eh_copyin(sc, NBASE, read_buffer, NLEN);
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printf("4.");
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if (bcmp(test_data, read_buffer, NLEN))
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PRINTF("Block test failed\n");
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printf("5.");
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FREE(test_data, M_TEMP);
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FREE(read_buffer, M_TEMP);
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}
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}
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/* This is always true for our ether h */
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sc->sc_physstart = 0x4000;
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sc->sc_physend = 0x6000;
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/* Get out ethernet address */
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sc->sc_arpcom.ac_enaddr[0] = 0x00;
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sc->sc_arpcom.ac_enaddr[1] = 0x00;
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sc->sc_arpcom.ac_enaddr[2] = 0xc0;
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sc->sc_arpcom.ac_enaddr[3] = 0x41;
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sc->sc_arpcom.ac_enaddr[4] = bootconfig.machine_id[1];
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sc->sc_arpcom.ac_enaddr[5] = bootconfig.machine_id[0];
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/* Copy the ether addr cards filter */
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PAGE(1);
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for (counter=0; counter<6; counter++)
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SetReg(((counter+1)<<2), sc->sc_arpcom.ac_enaddr[counter]);
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PAGE(0);
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/* Tell the podule system about our successful probe */
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pa->pa_podule_number = podule;
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pa->pa_podule = &podules[podule];
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return 1;
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}
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void
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ehattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct eh_softc *sc = (void *) self;
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struct podule_attach_args *pa = (void *)aux;
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struct ifnet *ifp = &sc->sc_arpcom.ac_if;
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int irq;
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int temp;
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/* Check a few things about the attach args */
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sc->sc_podule_number = pa->pa_podule_number;
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if (sc->sc_podule_number == -1)
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panic("Podule has disappeared !");
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sc->sc_podule = &podules[sc->sc_podule_number];
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podules[sc->sc_podule_number].attached = 1;
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/* Fill in my application form to attach to the networking system */
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ifp->if_unit = sc->sc_dev.dv_unit;
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ifp->if_name = ehcd.cd_name;
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ifp->if_start = ehstart;
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ifp->if_ioctl = ehioctl;
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ifp->if_watchdog = ehwatchdog;
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ifp->if_flags = IFF_BROADCAST | IFF_NOTRAILERS;
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/* Signed, dated then sent */
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if_attach(ifp);
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ether_ifattach(ifp);
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/* Not print some stuff for the attach line, starting with the address */
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PRINTF(" address %s", ether_sprintf(sc->sc_arpcom.ac_enaddr));
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/* Now the transfer mode we're operating in */
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switch (sc->sc_flags & MODE_MASK) {
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case MODE_PIO:
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PRINTF(" pio mode");
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break;
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case MODE_SHRAM:
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PRINTF(" ram mode");
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break;
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default:
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panic("Ether H probe set an unknown mode");
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}
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/* Get an irq handler installed */
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SetReg(EH_IMR, 0);
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SetReg(EH_ISR, 0xff);
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sc->sc_ih.ih_func = ehintr;
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sc->sc_ih.ih_arg = sc;
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sc->sc_ih.ih_level = IPL_NET;
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irq = (sc->sc_podule_number>=MAX_PODULES) ? IRQ_NETSLOT : IRQ_PODULE;
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if (irq_claim(irq, &sc->sc_ih))
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panic("Cannot install IRQ handler");
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/* This loopbacks the card on reset, and stops riscos locking */
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if (shutdownhook_establish(eh_shutdown, (void *)sc)==NULL)
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panic("Cannot install shutdown handler");
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/* Reprogram CONFIGA. I dont think we should do this any more */
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temp = GetReg(EH_CONFIGA);
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temp = GetReg(EH_CONFIGA);
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temp &= ~0x38;
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SetReg(EH_CONFIGA, temp | (3<<3));
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/* And that's it */
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PRINTF("\n");
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}
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/****************************************************************************/
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/* Net subsystem interface **************************************************/
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/****************************************************************************/
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#define NEXT_TXBUF (((sc->sc_txcur+1)>=NTXBUF) ? 0 : (sc->sc_txcur+1))
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void
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ehstart(ifp)
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struct ifnet *ifp;
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{
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struct eh_softc *sc = ehcd.cd_devs[ifp->if_unit];
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int cur;
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struct mbuf *m0, *m;
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int nextbuf;
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char *buffer;
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char txbuf[TXBUF_SIZE];
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int len = 0;
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PAGE(0);
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if ((ifp->if_flags & IFF_OACTIVE) != 0)
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return;
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/* This is for pipelined transmit. At present just use 1 buffer */
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for (;;) {
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/* The #ifdef PIPELINE_TRANSMIT code is total screwed */
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#ifdef PIPELINE_TRANSMIT
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nextbuf = NEXT_TXBUF;
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if ( nextbuf == sc->sc_txlst )
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ifp->if_flags |= IFF_OACTIVE;
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break;
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}
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#else
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nextbuf = 0;
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#endif
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/*** Speed up - In future, copy the bufs direct to the card ***/
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/* Copy a frame out of the mbufs */
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IF_DEQUEUE(&sc->sc_arpcom.ac_if.if_snd, m);
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if ( !m )
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break;
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buffer = txbuf;
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len = 0;
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for ( m0=m; m && (len + m->m_len) < TXBUF_SIZE; m=m->m_next ) {
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bcopy(mtod(m,caddr_t), buffer, m->m_len);
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buffer+=m->m_len;
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len+=m->m_len;
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}
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|
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m_freem(m0);
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len = max ( len, ETHER_MIN_LEN );
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/* And blat it to the card */
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eh_copyout ( sc, txbuf, sc->sc_tbs[nextbuf], len );
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#ifdef PIPELINE_TRANSMIT
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sc->sc_txlst = nextbuf;
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#endif
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PAGE(0);
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SetReg ( EH_TPSR, sc->sc_tbs[nextbuf]>>8 );
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SetReg ( EH_TBCR0, len&0xff );
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SetReg ( EH_TBCR1, (len>>8) & 0xff );
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cur = GetReg(EH_COMMAND);
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|
|
eh_transmit_command (sc );
|
|
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
ifp->if_timer = 30;
|
|
|
|
#ifndef PIPELINE_TRANSMIT
|
|
break;
|
|
#endif
|
|
}
|
|
}
|
|
|
|
#define IZSET(a,b) ((a->if_flags&b)!=0)
|
|
#define IZCLR(a,b) ((a->if_flags&b)==0)
|
|
#define DOSET(a,b) (a->if_flags|=b)
|
|
#define DOCLR(a,b) (a->if_flags&=~b)
|
|
|
|
int
|
|
ehioctl(ifp, cmd, data)
|
|
struct ifnet *ifp;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
{
|
|
struct eh_softc *sc = ehcd.cd_devs[ifp->if_unit];
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
int s = splimp ();
|
|
int error = 0;
|
|
|
|
switch (cmd) {
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
switch ( ifa->ifa_addr->sa_family ) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
ehinit(sc);
|
|
arp_ifinit(&sc->sc_arpcom, ifa);
|
|
break;
|
|
#endif
|
|
default:
|
|
ehinit(sc);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
sc->promisc = ifp->if_flags & ( IFF_PROMISC | IFF_ALLMULTI );
|
|
|
|
if ( IZCLR(ifp,IFF_UP) && IZSET(ifp,IFF_RUNNING) ) {
|
|
/* Interface marked down, but still running */
|
|
ehstop(sc);
|
|
DOCLR(ifp,IFF_RUNNING);
|
|
} else if ( IZSET(ifp,IFF_UP) && IZCLR(ifp,IFF_RUNNING) ) {
|
|
/* Just marked up, not running yet */
|
|
ehinit(sc);
|
|
} else {
|
|
/* Reset to invoke changes in other registers */
|
|
ehstop(sc);
|
|
ehinit(sc);
|
|
}
|
|
|
|
default:
|
|
error = EINVAL;
|
|
}
|
|
|
|
splx (s);
|
|
return error;
|
|
}
|
|
|
|
void
|
|
ehwatchdog(unit)
|
|
int unit;
|
|
{
|
|
struct eh_softc *sc = ehcd.cd_devs[unit];
|
|
|
|
log (LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname );
|
|
sc->sc_arpcom.ac_if.if_oerrors++;
|
|
|
|
ehinit (sc);
|
|
}
|
|
|
|
/*
|
|
* void eh_stop_controller ( struct eh_softc *sc )
|
|
*
|
|
* Software reset command, takes the controller offline, no packets will be
|
|
* received or transmitted. Any reception or transmission inprogres will
|
|
* continue to completion before entering the reset state.
|
|
*/
|
|
|
|
void
|
|
eh_stop_controller(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
SetReg ( EH_COMMAND, ((GetReg(EH_COMMAND)&0xfc)|1) );
|
|
delay ( 10000 ); /* Change this to wait on the ISR bit */
|
|
}
|
|
|
|
/*
|
|
* void eh_start_controller ( struct eh_softc *sc )
|
|
*
|
|
* Activte the NIC core after either power up or when the NIC Core has
|
|
* been placed in a reset mode by eh_stop_controller or an error.
|
|
*/
|
|
|
|
void
|
|
eh_start_controller(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
int temp = GetReg(EH_COMMAND);
|
|
SetReg ( EH_COMMAND, ( (temp&0xfc)|2) );
|
|
}
|
|
|
|
void
|
|
eh_transmit_command(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
/* Explicit set here. There is no other reasonable combination */
|
|
SetReg ( EH_COMMAND, COM_ABORT|COM_STA|COM_TXP);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
/* Remote DMA handling ******************************************************/
|
|
/****************************************************************************/
|
|
|
|
/* Remote DMA handling is going to undergo a major overhaul real soon now */
|
|
|
|
/* We musn't fail */
|
|
|
|
inline void
|
|
eh_ensure_dma_ok(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
register int isr = GetReg ( EH_ISR );
|
|
register int status = GetReg ( EH_COMMAND );
|
|
int dummy;
|
|
|
|
if ((status&COM_ABORT)==0) {
|
|
SetReg ( EH_COMMAND, status|COM_ABORT );
|
|
while ((isr&ISR_RDC)==0) {
|
|
dummy = GetReg ( EH_DATA_PORT );
|
|
delay(50);
|
|
}
|
|
}
|
|
|
|
/* Reset the COM_TXP bit. This does not abort transmission */
|
|
|
|
SetReg(EH_COMMAND, 0x22);
|
|
}
|
|
|
|
inline int
|
|
eh_ensure_dma_competed(sc, type)
|
|
struct eh_softc *sc;
|
|
int type;
|
|
{
|
|
register int status = GetReg ( EH_COMMAND );
|
|
|
|
if ( (status&COM_ABORT)==0 ) {
|
|
int dummy=0;
|
|
printf ( "EHDEBUG: Remote %d wasn't finished\n", type );
|
|
SetReg ( EH_COMMAND, status|COM_ABORT );
|
|
switch ( type ) {
|
|
case COM_READ:
|
|
dummy = GetReg ( EH_DATA_PORT );
|
|
break;
|
|
case COM_WRITE:
|
|
SetReg ( EH_DATA_PORT, dummy );
|
|
break;
|
|
}
|
|
ehinit (sc);
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* Do an eh_copyin, but take into consideration ring wrap */
|
|
|
|
int
|
|
eh_copyring(sc, src, dest, len)
|
|
struct eh_softc *sc;
|
|
int src;
|
|
char *dest;
|
|
int len;
|
|
{
|
|
if ( (src+len)>sc->sc_rbd ) {
|
|
register int in = sc->sc_rbd - src;
|
|
if ( eh_copyin ( sc, src, dest, in )==0 ) {
|
|
printf ( "copyring failed pass 1\n" );
|
|
return 0;
|
|
}
|
|
if ( eh_copyin ( sc, sc->sc_rbs, dest+in, len-in )==0 ) {
|
|
printf ( "copyring failed pass 2\n" );
|
|
return 0;
|
|
}
|
|
} else {
|
|
if ( eh_copyin ( sc, src, dest, len )==0 ) {
|
|
printf ( "copyring faild on 1 pass copy\n" );
|
|
return 0;
|
|
}
|
|
}
|
|
return len;
|
|
}
|
|
|
|
int
|
|
eh_copyin(sc, src, dest, len)
|
|
struct eh_softc *sc;
|
|
int src;
|
|
char *dest;
|
|
int len;
|
|
{
|
|
int counter;
|
|
int s;
|
|
short *dst = (short *)dest;
|
|
|
|
s = splhigh(); /* Erm, maybe not needed now */
|
|
|
|
if (len & 1)
|
|
len++;
|
|
if (src & 1) {
|
|
printf ( "EHDEBUG: Copying from odd address\n" );
|
|
src++;
|
|
}
|
|
|
|
/* Remote DMA to the DP83905 must be done with care. If we dont */
|
|
/* do it exactly right, it punishes us by locking the bus. */
|
|
|
|
eh_ensure_dma_ok (sc);
|
|
|
|
/* Set up the DMA */
|
|
|
|
SetReg ( EH_RSAR0, src & 0xff );
|
|
SetReg ( EH_RSAR1, (src>>8) & 0xff );
|
|
SetReg ( EH_RBCR0, len & 0xff );
|
|
SetReg ( EH_RBCR1, (len>>8) & 0xff );
|
|
|
|
/* Set the DMA running */
|
|
/* REMOTE_DMA ( COM_READ ); */ /* SetReg ( EH_COMMAND, 0x0a ); */
|
|
SetReg ( EH_COMMAND, COM_READ|COM_STA );
|
|
|
|
for ( counter=0; counter<len; counter+=2 )
|
|
*(dst++)=ReadShort ( sc->sc_reg + EH_DATA_PORT );
|
|
|
|
splx(s);
|
|
|
|
if ( eh_ensure_dma_competed ( sc, COM_READ ) )
|
|
return 0;
|
|
|
|
return len;
|
|
}
|
|
|
|
int
|
|
eh_copyout(sc, src, dest, len)
|
|
struct eh_softc *sc;
|
|
char *src;
|
|
int dest;
|
|
int len;
|
|
{
|
|
int counter;
|
|
int s;
|
|
short *sr = (short *)src;
|
|
|
|
if (len & 1)
|
|
len++;
|
|
if (dest & 1) {
|
|
printf ( "EHDEBUG: Copying to odd address\n" );
|
|
dest++;
|
|
}
|
|
|
|
s = splhigh(); /* Erm, maybe not needed now */
|
|
|
|
/* Remote DMA to the DP83905 must be done with care. If we dont */
|
|
/* do it exactly right, it punishes us by locking the bus. */
|
|
|
|
eh_ensure_dma_ok (sc);
|
|
|
|
/* Set up the DMA */
|
|
|
|
SetReg ( EH_RSAR0, dest & 0xff );
|
|
SetReg ( EH_RSAR1, (dest>>8) & 0xff );
|
|
SetReg ( EH_RBCR0, len & 0xff );
|
|
SetReg ( EH_RBCR1, (len>>8) & 0xff );
|
|
|
|
/* Set the DMA running */
|
|
/*REMOTE_DMA ( COM_WRITE );*/ /* SetReg ( EH_COMMAND, 0x0a ); */
|
|
SetReg ( EH_COMMAND, COM_WRITE|COM_STA );
|
|
|
|
for ( counter=0; counter<len; counter+=2 ) {
|
|
WriteShort ( sc->sc_reg + EH_DATA_PORT, *(sr) );
|
|
sr++;
|
|
}
|
|
|
|
splx(s);
|
|
|
|
if ( eh_ensure_dma_competed ( sc, COM_WRITE ) )
|
|
return 0;
|
|
|
|
return len;
|
|
}
|
|
|
|
#define ALLOCBLK(v,s) (v)=card_freestart; \
|
|
card_freestart+=((s)+0xff)&(~0xff)
|
|
|
|
void
|
|
ehinit(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
int card_freestart;
|
|
int counter;
|
|
|
|
PAGE(0);
|
|
|
|
/* Lay out the cards ram */
|
|
card_freestart = sc->sc_physstart;
|
|
|
|
/* Allocate receive buffers */
|
|
|
|
ALLOCBLK ( sc->sc_rbs, (RXBUF_SIZE*NRXBUF) );
|
|
sc->sc_rbd = card_freestart;
|
|
sc->sc_nxtpkt = sc->sc_rbs + 0x100;
|
|
|
|
/* Allocate transmit buffers */
|
|
for ( counter=0; counter<NTXBUF; counter++ ) {
|
|
ALLOCBLK ( sc->sc_tbs[counter], TXBUF_SIZE );
|
|
}
|
|
|
|
if ( card_freestart > sc->sc_physend ) {
|
|
printf ( "eh: card short of ram %02x required %02x present\n",
|
|
card_freestart, sc->sc_physstart );
|
|
sc->sc_arpcom.ac_if.if_flags &= ~IFF_RUNNING;
|
|
sc->sc_arpcom.ac_if.if_flags |= IFF_OACTIVE;
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Bring the controller up
|
|
*
|
|
* The ordering here is critical. Dont change unless you know what
|
|
* you're doing
|
|
*/
|
|
|
|
/* Reset the card */
|
|
|
|
SetReg ( EH_RESET, 0xff );
|
|
delay (50000);
|
|
SetReg ( EH_RESET, 0x00 );
|
|
delay (50000);
|
|
|
|
/* 1. Program the command register for page 0 */
|
|
|
|
SetReg ( EH_COMMAND, 0x21 );
|
|
|
|
/* 2. Initialize the Data configuration register */
|
|
|
|
SetReg ( EH_DCR, DCR_WTS|DCR_LS|(0<<5) );
|
|
|
|
/* 3. Clear RBCR if using remote DMA */
|
|
|
|
SetReg ( EH_RBCR0, 0 );
|
|
SetReg ( EH_RBCR1, 0 );
|
|
|
|
/* 4. Initialise RCR */
|
|
|
|
SetReg ( EH_RCR, 0x04 );
|
|
|
|
/* 5. Place the controller in loopback mode 1 or 2 TCR=02H or 04H */
|
|
|
|
SetReg ( EH_TCR, 0x02 );
|
|
|
|
/* 6. Initiliase Receive ring buffer BNDRY PSTART PSTOP */
|
|
|
|
SetReg ( EH_BNRY, sc->sc_rbs >> 8 );
|
|
SetReg ( EH_PSTART, sc->sc_rbs >> 8 );
|
|
SetReg ( EH_PSTOP, sc->sc_rbd >> 8 );
|
|
|
|
/* 7. Clear ISR */
|
|
|
|
SetReg ( EH_ISR, 0xff );
|
|
|
|
/* 8. Initialise IMR */
|
|
|
|
SetReg ( EH_IMR, ISR_PRX|ISR_PTX|ISR_RXE|ISR_TXE|ISR_OVW|ISR_CNT );
|
|
|
|
/* 9. Program command register for page 1 COM=0x61 */
|
|
/* Initialise PAR MAR and CURR */
|
|
|
|
PAGE(1);
|
|
|
|
SetReg ( EH_CURR, sc->sc_nxtpkt >> 8 );
|
|
|
|
for ( counter=0; counter<6; counter++ )
|
|
SetReg ( ((counter+1)<<2), sc->sc_arpcom.ac_enaddr[counter] );
|
|
|
|
/* Put controller into start mode COM = 0x22 */
|
|
|
|
SetReg ( EH_COMMAND, 0x22 );
|
|
|
|
/* Initialise the TCR */
|
|
|
|
SetReg ( EH_TCR, TCR_NORMALLOOP );
|
|
|
|
/* Interface is up */
|
|
|
|
sc->sc_arpcom.ac_if.if_flags |= IFF_RUNNING;
|
|
sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
|
|
|
|
ehstart(&sc->sc_arpcom.ac_if);
|
|
}
|
|
|
|
int
|
|
ehstop(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
int s = splimp();
|
|
eh_stop_controller(sc);
|
|
SetReg(EH_DCR, DCR_LS|DCR_LAS);
|
|
splx(s);
|
|
return 0;
|
|
}
|
|
|
|
#define INTR_ACK(s) SetReg ( EH_ISR, s )
|
|
|
|
/* In need of tidying */
|
|
|
|
#undef MYTEST
|
|
|
|
void
|
|
eh_rint(sc)
|
|
struct eh_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
|
|
struct mbuf *top, **mp, *m;
|
|
struct ether_header eh;
|
|
struct eh_rxhdr hdr;
|
|
int status = GetReg(EH_RSR);
|
|
int rxstatus=0;
|
|
int totlen, len;
|
|
int ptr;
|
|
int rbend;
|
|
int thispacket;
|
|
int bnry;
|
|
|
|
#ifdef MYTEST
|
|
int old;
|
|
#endif
|
|
|
|
/* Get the end of the ring buffer */
|
|
|
|
PAGE(1);
|
|
rbend = GetReg ( EH_CURR ) << 8;
|
|
PAGE(0);
|
|
|
|
/* If we have something to receive then receive it */
|
|
|
|
if ( status&RSR_PRX ) {
|
|
/* Remove all the packets from the ring buffer */
|
|
for ( ptr=sc->sc_nxtpkt; ptr!=rbend ; ptr = sc->sc_nxtpkt ) {
|
|
|
|
thispacket = ptr;
|
|
/* Copy the ether h receive header */
|
|
|
|
if ( eh_copyring ( sc, ptr, (char *)&hdr, 4 ) != 4 ) {
|
|
printf ( "eh: Failed copying in header\n" );
|
|
printf ( "eh: thispacket %02x\n", thispacket );
|
|
ehinit (sc);
|
|
return;
|
|
}
|
|
|
|
rxstatus = hdr.rx_status;
|
|
totlen = (hdr.rx_rbc1<<8) + hdr.rx_rbc0;
|
|
|
|
ptr+=4;
|
|
|
|
/* Check the packet's status */
|
|
if ( hdr.rx_status&(RSR_CRC|RSR_FAE|RSR_FO|RSR_MPA) ) {
|
|
printf ( "eh: intact packet is corrupt %02x %04x\n",
|
|
hdr.rx_status, ptr );
|
|
}
|
|
|
|
if (((hdr.rx_nxtpkt<<8)>sc->sc_rbd) || ((hdr.rx_nxtpkt<<8)<sc->sc_rbs)) {
|
|
printf ( "eh: ring buffer empty %04x %04x\n",
|
|
hdr.rx_nxtpkt, ptr );
|
|
ehinit (sc);
|
|
return;
|
|
}
|
|
|
|
if (0)
|
|
printf ( "pulling packet at %08x, next at %08x\n", thispacket, sc->sc_nxtpkt );
|
|
|
|
if ( totlen>ETHER_MAX_LEN ) {
|
|
printf ( "eh: giant packet received %04x\n", totlen );
|
|
totlen = ETHER_MAX_LEN;
|
|
}
|
|
|
|
/* Copy the ether header */
|
|
|
|
if ((eh_copyring ( sc, ptr, (char *)&eh, sizeof (eh)))!=sizeof(eh)) {
|
|
printf ( "eh: Failed copying in ethenet header\n" );
|
|
return;
|
|
}
|
|
ptr+=sizeof(eh);
|
|
totlen-=sizeof(eh);
|
|
|
|
/* Copy the packet into mbufs */
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if ( m==0 )
|
|
return;
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_pkthdr.len = totlen;
|
|
len = MHLEN;
|
|
top = 0;
|
|
mp = ⊤
|
|
|
|
while ( totlen > 0 ) {
|
|
if (top) {
|
|
MGET(m, M_DONTWAIT, MT_DATA);
|
|
if ( m==0 ) {
|
|
m_freem(top);
|
|
goto skip;
|
|
}
|
|
len = MLEN;
|
|
}
|
|
if ( totlen >= MINCLSIZE ) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if (m->m_flags & M_EXT)
|
|
len = MCLBYTES;
|
|
}
|
|
m->m_len = len = min ( totlen, len );
|
|
|
|
if ((eh_copyring ( sc, ptr, mtod(m, caddr_t), len))!=len)
|
|
printf ( "eh: failed copying in buffer %d\n", len );
|
|
|
|
ptr += len;
|
|
totlen -= len;
|
|
*mp = m;
|
|
mp = &m->m_next;
|
|
}
|
|
|
|
m = top;
|
|
ifp->if_ipackets++;
|
|
ether_input(ifp, &eh, m );
|
|
skip:
|
|
|
|
/* Ok, I'm done with this packet */
|
|
|
|
sc->sc_nxtpkt = hdr.rx_nxtpkt << 8;
|
|
|
|
/* Set the boundary pointer on the ring buffer */
|
|
|
|
bnry = (sc->sc_nxtpkt>>8)-1;
|
|
if ( bnry < (sc->sc_rbs>>8) )
|
|
bnry = (sc->sc_rbd>>8)-1;
|
|
SetReg ( EH_BNRY, bnry );
|
|
|
|
PAGE(1);
|
|
rbend = GetReg ( EH_CURR ) << 8;
|
|
PAGE(0);
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
ehintr(arg)
|
|
void *arg;
|
|
{
|
|
struct eh_softc *sc = arg;
|
|
register int isr = GetReg ( EH_ISR ); /* Is char of int faster ? */
|
|
register int times = 0;
|
|
|
|
PAGE(0);
|
|
|
|
if ( isr & ISR_RXE ) {
|
|
int status = GetReg ( EH_RSR );
|
|
PRINTF ( "eh: Receive Error:" );
|
|
if ( status&RSR_PRX )
|
|
PRINTF ( " packet received intact (this should happen)" );
|
|
if ( status&RSR_CRC )
|
|
PRINTF ( " crc error" );
|
|
if ( status&RSR_FAE )
|
|
PRINTF ( " frame alignment error" );
|
|
if ( status&RSR_FO )
|
|
PRINTF ( " fifo overrun" );
|
|
if ( status&RSR_MPA )
|
|
PRINTF ( " missed packet" );
|
|
if ( status&RSR_DIS )
|
|
PRINTF ( " receiver disabled" );
|
|
printf ( "\n" );
|
|
INTR_ACK ( ISR_RXE );
|
|
ehinit (sc);
|
|
return 0;
|
|
}
|
|
|
|
if ( isr & ISR_PRX ) {
|
|
eh_rint (sc);
|
|
INTR_ACK ( ISR_PRX );
|
|
}
|
|
|
|
if ( isr & ISR_PTX ) {
|
|
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
|
|
int status;
|
|
INTR_ACK ( ISR_PTX );
|
|
ifp->if_timer=0;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
|
|
status = GetReg ( EH_TSR );
|
|
|
|
if ( status&TSR_PTX )
|
|
ifp->if_opackets++;
|
|
|
|
if ( status&TSR_COL )
|
|
ifp->if_collisions+=GetReg(EH_NCR);
|
|
|
|
if ( status&TSR_ABT )
|
|
PRINTF ( "eh: too many collisions\n" );
|
|
|
|
if ( status&TSR_CRS )
|
|
PRINTF ( "eh: no carrier\n" );
|
|
|
|
if ( status&TSR_CDH )
|
|
PRINTF ( "eh: tranceiver failure, no heartbeat \n" );
|
|
|
|
if ( status&TSR_OWC )
|
|
PRINTF ( "eh: out of window \n" );
|
|
|
|
if ( status&(TSR_ABT|TSR_CRS|TSR_FU|TSR_CDH|TSR_OWC) )
|
|
ifp->if_oerrors++;
|
|
|
|
ehstart(ifp);
|
|
}
|
|
|
|
if ( isr & ISR_TXE ) {
|
|
INTR_ACK ( ISR_TXE );
|
|
PRINTF ( "ehintr: Transmit error\n" );
|
|
}
|
|
|
|
if ( isr & ISR_OVW ) {
|
|
INTR_ACK ( ISR_OVW );
|
|
PRINTF ( "ehintr: Counter overflow\n" );
|
|
}
|
|
|
|
if ( isr & ISR_RST ) {
|
|
INTR_ACK ( ISR_RST );
|
|
PRINTF ( "ehintr: Reset status\n" );
|
|
}
|
|
|
|
if ((times++)>16) {
|
|
PRINTF ( "eh: possible interrupt jammed on." );
|
|
SetReg ( EH_IMR, 0x0 );
|
|
}
|
|
|
|
/* Dont do this for the mo until I'm sure.
|
|
|
|
isr = GetReg ( EH_ISR );
|
|
|
|
if ( (isr&GetReg(EH_IMR))!=0 )
|
|
goto more;
|
|
*/
|
|
|
|
if ( (isr&GetReg(EH_IMR))!=0 )
|
|
printf ( "eh: Interrupt not serviced\n" );
|
|
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
/* Auxilary routines ********************************************************/
|
|
/****************************************************************************/
|
|
|
|
void
|
|
eh_shutdown(arg)
|
|
void *arg;
|
|
{
|
|
struct eh_softc *sc = (struct eh_softc *)arg;
|
|
|
|
/* On shutdown put us in loopback */
|
|
|
|
SetReg(EH_DCR, DCR_LAS);
|
|
SetReg(EH_TCR, TCR_NICMOD);
|
|
|
|
/* and program remote dma so riscos doesnt lock */
|
|
|
|
SetReg(EH_RSAR0, 0);
|
|
SetReg(EH_RSAR1, 1);
|
|
SetReg(EH_RBCR0, 0);
|
|
SetReg(EH_RBCR1, 1);
|
|
}
|