rafal e9ad38e77d Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an ... interrupt to sneak in after EXL had been set; the interrupt EPC was stale as PC isn't saved if EXL is set, causing the eret to return to the wrong place and leading to kernel-mode TLB misses on user addresses. The bug was discovered by the japanese NetBSD/*mips folks and the same fix was found independently by shinohara-san (shin@netbsd.org).		2001-07-24 23:13:33 +00:00
..
bonito	Add some macros to decode the BONITO revision register.	2001-06-25 20:15:03 +00:00
conf	By adding a well-placed space or two, 'make depend' no longer loses	2001-07-19 01:46:15 +00:00
include	Modernise data and stack size limits.	2001-07-18 04:15:55 +00:00
mips	Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an	2001-07-24 23:13:33 +00:00
Makefile
Makefile.inc