bb66aaeadc
* Eliminate disable interrupts in ncr_pdma_in. No more fifo overflows at high baud rates :-) (Thank's to Ian Dall for this).
419 lines
10 KiB
C
419 lines
10 KiB
C
/* $NetBSD: ncr.c,v 1.38 1997/07/09 19:28:25 matthias Exp $ */
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/*
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* Copyright (c) 1996, 1997 Matthias Pfaller.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Matthias Pfaller.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsi_message.h>
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#include <scsi/scsiconf.h>
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#include <dev/ic/ncr5380reg.h>
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#include <dev/ic/ncr5380var.h>
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#include <machine/autoconf.h>
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#include <machine/cpufunc.h>
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/*
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* Function declarations:
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*/
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static int ncr_pdma_in __P((struct ncr5380_softc *, int, int, u_char *));
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static int ncr_pdma_out __P((struct ncr5380_softc *, int, int, u_char *));
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static void ncr_intr __P((void *));
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static void ncr_attach __P((struct device *, struct device *, void *));
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static int ncr_match __P((struct device *, struct cfdata *, void *));
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static int ncr_ready __P((struct ncr5380_softc *sc));
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static void ncr_wait_not_req __P((struct ncr5380_softc *sc));
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/*
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* Some constants.
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*/
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#define PDMA_ADDRESS ((volatile u_char *) 0xffe00000)
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#define NCR5380 ((volatile u_char *) 0xffd00000)
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/*
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* Bit allocation in config's sc_flags field.
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*
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* bit 0: disable disconnect/reconnect
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* bit 1: disable use of interrupts
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* bit 2: reset scsi bus in ncr_attach
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* bits 8-15: disable parity (per target)
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* bits 16-23: disable disconnect/reconnect (per target)
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*/
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#define NCR_DISABLE_RESELECT 1
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#define NCR_DISABLE_INTERRUPTS 2
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#define NCR_RESET_BUS 4
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/*
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* Make the default options patchable with gdb.
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*/
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int ncr_default_options = 0;
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struct scsi_adapter ncr_switch = {
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ncr5380_scsi_cmd, /* scsi_cmd() */
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minphys, /* scsi_minphys() */
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0, /* open_target_lu() */
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0 /* close_target_lu() */
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};
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struct scsi_device ncr_dev = {
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NULL, /* use default error handler */
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NULL, /* do not have a start function */
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NULL, /* have no async handler */
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NULL /* Use default done routine */
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};
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struct cfattach ncr_ca = {
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sizeof(struct ncr5380_softc), ncr_match, ncr_attach
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};
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struct cfdriver ncr_cd = {
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NULL, "ncr", DV_DULL
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};
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static int
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ncr_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct confargs *ca = aux;
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int unit = cf->cf_unit;
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if (unit != 0) /* Only one unit */
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return(0);
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ca->ca_addr = (int)NCR5380;
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ca->ca_irq = IR_SCSI1;
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return(1);
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}
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static void
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ncr_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct confargs *ca = aux;
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struct ncr5380_softc *sc = (struct ncr5380_softc *) self;
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int flags;
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/*
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* For now we only support the DP8490.
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*/
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scsi_select_ctlr(DP8490);
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/* Pull in config flags. */
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flags = ca->ca_flags | ncr_default_options;
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if (flags)
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printf(": flags %d\n", flags);
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else
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printf("\n");
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/*
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* Fill in the prototype scsi_link.
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*/
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sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
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sc->sc_link.adapter_softc = sc;
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sc->sc_link.adapter_target = 7;
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sc->sc_link.adapter = &ncr_switch;
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sc->sc_link.device = &ncr_dev;
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/*
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* Initialize NCR5380 register addresses.
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*/
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sc->sci_r0 = NCR5380 + 0;
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sc->sci_r1 = NCR5380 + 1;
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sc->sci_r2 = NCR5380 + 2;
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sc->sci_r3 = NCR5380 + 3;
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sc->sci_r4 = NCR5380 + 4;
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sc->sci_r5 = NCR5380 + 5;
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sc->sci_r6 = NCR5380 + 6;
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sc->sci_r7 = NCR5380 + 7;
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/*
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* We only have to set the sc_pio_in and sc_pio_out
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* function pointers. The rest of the MD functions are
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* not used and default to NULL.
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*/
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sc->sc_pio_in = ncr_pdma_in;
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sc->sc_pio_out = ncr_pdma_out;
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/*
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* Copy options from cf_flags to sc_flags and sc_parity_disable.
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*/
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if (flags & NCR_DISABLE_RESELECT)
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sc->sc_no_disconnect = 0xff;
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if (flags & NCR_DISABLE_INTERRUPTS)
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sc->sc_flags |= NCR5380_FORCE_POLLING;
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sc->sc_parity_disable = (flags >> 8) & 0xff;
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sc->sc_no_disconnect |= (flags >> 16) & 0xff;
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intr_establish(IR_SCSI1, ncr_intr, (void *)sc, sc->sc_dev.dv_xname,
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IPL_BIO, IPL_BIO, RISING_EDGE);
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/*
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* Initialize the SCSI controller itself.
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*/
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ncr5380_init(sc);
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if (flags & NCR_RESET_BUS)
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ncr5380_reset_scsibus(sc);
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config_found(self, &(sc->sc_link), scsiprint);
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}
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static void
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ncr_intr(arg)
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void *arg;
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{
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struct ncr5380_softc *sc = arg;
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if (*sc->sci_csr & SCI_CSR_INT) {
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if (ncr5380_intr(sc) == 0) {
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printf("%s: ", sc->sc_dev.dv_xname);
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if ((*sc->sci_bus_csr & ~SCI_BUS_RST) == 0)
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printf("BUS RESET\n");
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else
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printf("spurious interrupt\n");
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SCI_CLR_INTR(sc);
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}
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}
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}
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/*
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* PDMA stuff
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*/
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#define byte_data ((volatile u_char *)pdma)
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#define word_data ((volatile u_short *)pdma)
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#define long_data ((volatile u_long *)pdma)
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#define W1(n) *byte_data = *(data + n)
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#define W2(n) *word_data = *((u_short *)data + n)
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#define W4(n) *long_data = *((u_long *)data + n)
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#define R1(n) *(data + n) = *byte_data
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#define R4(n) *((u_long *)data + n) = *long_data
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#ifndef NCR_TSIZE_OUT
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#define NCR_TSIZE_OUT 512
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#endif
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#ifndef NCR_TSIZE_IN
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#define NCR_TSIZE_IN 512
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#define NCR_UNROLL_TIMES 8
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#define NCR_UNROLL_SIZE (NCR_UNROLL_TIMES * sizeof(u_long))
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#endif
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#define TIMEOUT 1000000
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static __inline int
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ncr_ready(sc)
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struct ncr5380_softc *sc;
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{
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int i;
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for (i = TIMEOUT; i > 0; i--) {
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if ((*sc->sci_csr & (SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH)) ==
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(SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH))
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return(1);
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if ((*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0 ||
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SCI_BUSY(sc) == 0)
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return(0);
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}
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printf("%s: ready timeout\n", sc->sc_dev.dv_xname);
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return(0);
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}
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/* Return zero on success. */
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static __inline void ncr_wait_not_req(sc)
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struct ncr5380_softc *sc;
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{
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int timo;
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for (timo = TIMEOUT; timo; timo--) {
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if ((*sc->sci_bus_csr & SCI_BUS_REQ) == 0 ||
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(*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0 ||
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SCI_BUSY(sc) == 0) {
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return;
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}
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}
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printf("%s: pdma not_req timeout\n", sc->sc_dev.dv_xname);
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}
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static int
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ncr_pdma_in(sc, phase, datalen, data)
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struct ncr5380_softc *sc;
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int phase, datalen;
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u_char *data;
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{
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volatile u_char *pdma = PDMA_ADDRESS;
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int resid, s;
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s = splbio();
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*sc->sci_mode |= SCI_MODE_DMA;
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*sc->sci_irecv = 0;
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for (resid = datalen; resid >= NCR_TSIZE_IN; resid -= NCR_TSIZE_IN) {
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int i;
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if (ncr_ready(sc) == 0) {
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goto interrupt;
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}
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for (i = (NCR_TSIZE_IN/NCR_UNROLL_SIZE); i--;
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data += NCR_UNROLL_SIZE) {
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R4(0); R4(1); R4(2); R4(3);
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R4(4); R4(5); R4(6); R4(7);
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}
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}
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if (resid) {
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int t = resid/sizeof(u_long);
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if (ncr_ready(sc) == 0) {
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goto interrupt;
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}
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/* Use duffs device to copy by 4 byte words */
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{
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int rem, nchunk;
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rem = t % NCR_UNROLL_TIMES;
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nchunk = t / NCR_UNROLL_TIMES;
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data += (rem - 1) * sizeof(u_long);
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switch(rem) {
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while(nchunk--) {
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data += NCR_UNROLL_SIZE;
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R4(-7);
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case 7: R4(-6);
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case 6: R4(-5);
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case 5: R4(-4);
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case 4: R4(-3);
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case 3: R4(-2);
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case 2: R4(-1);
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case 1: R4(0);
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case 0:
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}
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}
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data += sizeof(u_long);
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}
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t *= sizeof(int);
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resid -= t;
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for(; resid--; data++)
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R1(0);
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resid = 0;
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}
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ncr_wait_not_req(sc);
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interrupt:
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SCI_CLR_INTR(sc);
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*sc->sci_mode &= ~SCI_MODE_DMA;
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splx(s);
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return(datalen - resid);
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}
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static int
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ncr_pdma_out(sc, phase, datalen, data)
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struct ncr5380_softc *sc;
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int phase, datalen;
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u_char *data;
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{
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volatile u_char *pdma = PDMA_ADDRESS;
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int i, s, resid;
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u_char icmd;
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s = splbio();
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icmd = *(sc->sci_icmd) & SCI_ICMD_RMASK;
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*sc->sci_icmd = icmd | SCI_ICMD_DATA;
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*sc->sci_mode |= SCI_MODE_DMA;
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*sc->sci_dma_send = 0;
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resid = datalen;
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if (ncr_ready(sc) == 0) {
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goto interrupt;
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}
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if (resid > NCR_TSIZE_OUT) {
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/* Because of the chips DMA prefetch, phase changes
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* etc, won't be detected until we have written at
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* least one byte more. We pre-write 4 bytes so
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* subsequent transfers will be aligned to a 4 byte
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* boundary. Assuming disconects will only occur on
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* block boundaries, we then correct for the pre-write
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* when and if we get a phase change. If the chip had
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* DMA byte counting hardware, the assumption would not
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* be necessary.
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*/
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W4(0);
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data += 4;
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resid -= 4;
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for (; resid >= NCR_TSIZE_OUT; resid -= NCR_TSIZE_OUT) {
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if (ncr_ready(sc) == 0) {
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resid += 4; /* Overshot */
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goto interrupt;
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}
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movsd(data, (u_char *)pdma, NCR_TSIZE_OUT / 4);
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}
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if (ncr_ready(sc) == 0) {
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resid += 4; /* Overshot */
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goto interrupt;
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}
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}
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if (resid) {
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int t;
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t = resid / sizeof(int);
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movsd(data, (u_char *)pdma, t);
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t *= sizeof(int);
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resid -= t;
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movsb(data, (u_char *)pdma, resid);
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resid = 0;
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}
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for (i = TIMEOUT; i > 0; i--) {
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if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
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!= SCI_CSR_DREQ)
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break;
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}
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if (i != 0)
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*byte_data = 0;
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else
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printf("%s: timeout waiting for final SCI_DSR_DREQ.\n",
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sc->sc_dev.dv_xname);
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ncr_wait_not_req(sc);
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interrupt:
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SCI_CLR_INTR(sc);
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*sc->sci_mode &= ~SCI_MODE_DMA;
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*sc->sci_icmd = icmd;
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splx(s);
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return(datalen - resid);
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}
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