1008 lines
27 KiB
C
1008 lines
27 KiB
C
/* Generate code from to output assembler insns as recognized from rtl.
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Copyright (C) 1987, 88, 92, 94, 95, 1997 Free Software Foundation, Inc.
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* This program reads the machine description for the compiler target machine
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and produces a file containing these things:
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1. An array of strings `insn_template' which is indexed by insn code number
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and contains the template for output of that insn,
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2. An array of functions `insn_outfun' which, indexed by the insn code
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number, gives the function that returns a template to use for output of
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that insn. This is used only in the cases where the template is not
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constant. These cases are specified by a * or @ at the beginning of the
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template string in the machine description. They are identified for the
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sake of other parts of the compiler by a zero element in `insn_template'.
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3. An array of functions `insn_gen_function' which, indexed
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by insn code number, gives the function to generate a body
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for that pattern, given operands as arguments.
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4. An array of strings `insn_name' which, indexed by insn code number,
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gives the name for that pattern. Nameless patterns are given a name.
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5. An array of ints `insn_n_operands' which is indexed by insn code number
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and contains the number of distinct operands in the pattern for that insn,
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6. An array of ints `insn_n_dups' which is indexed by insn code number
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and contains the number of match_dup's that appear in the insn's pattern.
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This says how many elements of `recog_dup_loc' are significant
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after an insn has been recognized.
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7. An array of arrays of operand constraint strings,
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`insn_operand_constraint',
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indexed first by insn code number and second by operand number,
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containing the constraint for that operand.
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This array is generated only if register constraints appear in
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match_operand rtx's.
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8. An array of arrays of chars which indicate which operands of
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which insn patterns appear within ADDRESS rtx's. This array is
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called `insn_operand_address_p' and is generated only if there
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are *no* register constraints in the match_operand rtx's.
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9. An array of arrays of machine modes, `insn_operand_mode',
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indexed first by insn code number and second by operand number,
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containing the machine mode that that operand is supposed to have.
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Also `insn_operand_strict_low', which is nonzero for operands
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contained in a STRICT_LOW_PART.
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10. An array of arrays of int-valued functions, `insn_operand_predicate',
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indexed first by insn code number and second by operand number,
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containing the match_operand predicate for this operand.
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11. An array of ints, `insn_n_alternatives', that gives the number
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of alternatives in the constraints of each pattern.
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The code number of an insn is simply its position in the machine description;
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code numbers are assigned sequentially to entries in the description,
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starting with code number 0.
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Thus, the following entry in the machine description
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(define_insn "clrdf"
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[(set (match_operand:DF 0 "general_operand" "")
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(const_int 0))]
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""
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"clrd %0")
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assuming it is the 25th entry present, would cause
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insn_template[24] to be "clrd %0", and insn_n_operands[24] to be 1.
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It would not make an case in output_insn_hairy because the template
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given in the entry is a constant (it does not start with `*'). */
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#include <stdio.h>
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#include "hconfig.h"
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#include "rtl.h"
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#include "obstack.h"
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/* No instruction can have more operands than this.
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Sorry for this arbitrary limit, but what machine will
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have an instruction with this many operands? */
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#define MAX_MAX_OPERANDS 40
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static struct obstack obstack;
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struct obstack *rtl_obstack = &obstack;
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#define obstack_chunk_alloc xmalloc
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#define obstack_chunk_free free
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extern void free ();
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extern rtx read_rtx ();
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char *xmalloc ();
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static void fatal ();
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void fancy_abort ();
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static void error ();
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static void mybcopy ();
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static void mybzero ();
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static int n_occurrences ();
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/* insns in the machine description are assigned sequential code numbers
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that are used by insn-recog.c (produced by genrecog) to communicate
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to insn-output.c (produced by this program). */
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static int next_code_number;
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/* This counts all definitions in the md file,
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for the sake of error messages. */
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static int next_index_number;
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/* Record in this chain all information that we will output,
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associated with the code number of the insn. */
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struct data
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{
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int code_number;
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int index_number;
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char *name;
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char *template; /* string such as "movl %1,%0" */
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int n_operands; /* Number of operands this insn recognizes */
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int n_dups; /* Number times match_dup appears in pattern */
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int n_alternatives; /* Number of alternatives in each constraint */
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struct data *next;
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char *constraints[MAX_MAX_OPERANDS];
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/* Number of alternatives in constraints of operand N. */
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int op_n_alternatives[MAX_MAX_OPERANDS];
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char *predicates[MAX_MAX_OPERANDS];
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char address_p[MAX_MAX_OPERANDS];
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enum machine_mode modes[MAX_MAX_OPERANDS];
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char strict_low[MAX_MAX_OPERANDS];
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char outfun; /* Nonzero means this has an output function */
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};
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/* This variable points to the first link in the chain. */
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struct data *insn_data;
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/* Pointer to the last link in the chain, so new elements
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can be added at the end. */
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struct data *end_of_insn_data;
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/* Nonzero if any match_operand has a constraint string;
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implies that REGISTER_CONSTRAINTS will be defined
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for this machine description. */
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int have_constraints;
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/* Nonzero if some error has occurred. We will make all errors fatal, but
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might as well continue until we see all of them. */
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static int have_error;
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static void
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output_prologue ()
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{
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printf ("/* Generated automatically by the program `genoutput'\n\
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from the machine description file `md'. */\n\n");
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printf ("#include \"config.h\"\n");
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printf ("#include \"rtl.h\"\n");
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printf ("#include \"regs.h\"\n");
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printf ("#include \"hard-reg-set.h\"\n");
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printf ("#include \"real.h\"\n");
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printf ("#include \"insn-config.h\"\n\n");
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printf ("#include \"conditions.h\"\n");
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printf ("#include \"insn-flags.h\"\n");
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printf ("#include \"insn-attr.h\"\n\n");
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printf ("#include \"insn-codes.h\"\n\n");
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printf ("#include \"recog.h\"\n\n");
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printf ("#include <stdio.h>\n");
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printf ("#include \"output.h\"\n");
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}
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static void
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output_epilogue ()
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{
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register struct data *d;
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printf ("\nchar * const insn_template[] =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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if (d->template)
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printf (" \"%s\",\n", d->template);
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else
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printf (" 0,\n");
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}
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printf (" };\n");
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printf ("\nchar *(*const insn_outfun[])() =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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if (d->outfun)
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printf (" output_%d,\n", d->code_number);
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else
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printf (" 0,\n");
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}
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printf (" };\n");
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printf ("\nrtx (*const insn_gen_function[]) () =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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if (d->name && d->name[0] != '*')
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printf (" gen_%s,\n", d->name);
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else
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printf (" 0,\n");
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}
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printf (" };\n");
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printf ("\nchar *insn_name[] =\n {\n");
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{
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int offset = 0;
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int next;
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char * last_name = 0;
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char * next_name;
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register struct data *n;
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for (n = insn_data, next = 1; n; n = n->next, next++)
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if (n->name)
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{
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next_name = n->name;
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break;
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}
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for (d = insn_data; d; d = d->next)
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{
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if (d->name)
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{
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printf (" \"%s\",\n", d->name);
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offset = 0;
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last_name = d->name;
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next_name = 0;
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for (n = d->next, next = 1; n; n = n->next, next++)
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if (n->name)
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{
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next_name = n->name;
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break;
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}
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}
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else
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{
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offset++;
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if (next_name && (last_name == 0 || offset > next / 2))
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printf (" \"%s-%d\",\n", next_name, next - offset);
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else
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printf (" \"%s+%d\",\n", last_name, offset);
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}
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}
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}
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printf (" };\n");
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printf ("char **insn_name_ptr = insn_name;\n");
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printf ("\nconst int insn_n_operands[] =\n {\n");
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for (d = insn_data; d; d = d->next)
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printf (" %d,\n", d->n_operands);
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printf (" };\n");
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printf ("\nconst int insn_n_dups[] =\n {\n");
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for (d = insn_data; d; d = d->next)
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printf (" %d,\n", d->n_dups);
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printf (" };\n");
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if (have_constraints)
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{
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printf ("\nchar *const insn_operand_constraint[][MAX_RECOG_OPERANDS] =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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register int i;
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printf (" {");
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for (i = 0; i < d->n_operands; i++)
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{
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if (d->constraints[i] == 0)
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printf (" \"\",");
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else
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printf (" \"%s\",", d->constraints[i]);
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}
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if (d->n_operands == 0)
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printf (" 0");
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printf (" },\n");
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}
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printf (" };\n");
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}
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else
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{
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printf ("\nconst char insn_operand_address_p[][MAX_RECOG_OPERANDS] =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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register int i;
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printf (" {");
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for (i = 0; i < d->n_operands; i++)
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printf (" %d,", d->address_p[i]);
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if (d->n_operands == 0)
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printf (" 0");
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printf (" },\n");
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}
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printf (" };\n");
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}
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printf ("\nconst enum machine_mode insn_operand_mode[][MAX_RECOG_OPERANDS] =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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register int i;
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printf (" {");
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for (i = 0; i < d->n_operands; i++)
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printf (" %smode,", GET_MODE_NAME (d->modes[i]));
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if (d->n_operands == 0)
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printf (" VOIDmode");
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printf (" },\n");
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}
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printf (" };\n");
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printf ("\nconst char insn_operand_strict_low[][MAX_RECOG_OPERANDS] =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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register int i;
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printf (" {");
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for (i = 0; i < d->n_operands; i++)
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printf (" %d,", d->strict_low[i]);
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if (d->n_operands == 0)
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printf (" 0");
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printf (" },\n");
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}
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printf (" };\n");
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{
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/* We need to define all predicates used. Keep a list of those we
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have defined so far. There normally aren't very many predicates used,
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so a linked list should be fast enough. */
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struct predicate { char *name; struct predicate *next; } *predicates = 0;
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struct predicate *p;
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int i;
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printf ("\n");
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for (d = insn_data; d; d = d->next)
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for (i = 0; i < d->n_operands; i++)
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if (d->predicates[i] && d->predicates[i][0])
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{
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for (p = predicates; p; p = p->next)
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if (! strcmp (p->name, d->predicates[i]))
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break;
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if (p == 0)
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{
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printf ("extern int %s ();\n", d->predicates[i]);
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p = (struct predicate *) alloca (sizeof (struct predicate));
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p->name = d->predicates[i];
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p->next = predicates;
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predicates = p;
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}
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}
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printf ("\nint (*const insn_operand_predicate[][MAX_RECOG_OPERANDS])() =\n {\n");
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for (d = insn_data; d; d = d->next)
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{
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printf (" {");
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for (i = 0; i < d->n_operands; i++)
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printf (" %s,", ((d->predicates[i] && d->predicates[i][0])
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? d->predicates[i] : "0"));
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if (d->n_operands == 0)
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printf (" 0");
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printf (" },\n");
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}
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printf (" };\n");
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}
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printf ("\nconst int insn_n_alternatives[] =\n {\n");
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for (d = insn_data; d; d = d->next)
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printf (" %d,\n", d->n_alternatives);
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printf(" };\n");
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}
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/* scan_operands (X) stores in max_opno the largest operand
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number present in X, if that is larger than the previous
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value of max_opno. It stores all the constraints in `constraints'
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and all the machine modes in `modes'.
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THIS_ADDRESS_P is nonzero if the containing rtx was an ADDRESS.
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THIS_STRICT_LOW is nonzero if the containing rtx was a STRICT_LOW_PART. */
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static int max_opno;
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static int num_dups;
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static char *constraints[MAX_MAX_OPERANDS];
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static int op_n_alternatives[MAX_MAX_OPERANDS];
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static char *predicates[MAX_MAX_OPERANDS];
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static char address_p[MAX_MAX_OPERANDS];
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static enum machine_mode modes[MAX_MAX_OPERANDS];
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static char strict_low[MAX_MAX_OPERANDS];
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static char seen[MAX_MAX_OPERANDS];
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static void
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scan_operands (part, this_address_p, this_strict_low)
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rtx part;
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int this_address_p;
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int this_strict_low;
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{
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register int i, j;
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register char *format_ptr;
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int opno;
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if (part == 0)
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return;
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switch (GET_CODE (part))
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{
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case MATCH_OPERAND:
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opno = XINT (part, 0);
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if (opno > max_opno)
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max_opno = opno;
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if (max_opno >= MAX_MAX_OPERANDS)
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{
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error ("Too many operands (%d) in definition %d.\n",
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max_opno + 1, next_index_number);
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return;
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}
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if (seen[opno])
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error ("Definition %d specified operand number %d more than once.\n",
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next_index_number, opno);
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seen[opno] = 1;
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modes[opno] = GET_MODE (part);
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strict_low[opno] = this_strict_low;
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predicates[opno] = XSTR (part, 1);
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constraints[opno] = XSTR (part, 2);
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if (XSTR (part, 2) != 0 && *XSTR (part, 2) != 0)
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{
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op_n_alternatives[opno] = n_occurrences (',', XSTR (part, 2)) + 1;
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have_constraints = 1;
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}
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address_p[opno] = this_address_p;
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return;
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case MATCH_SCRATCH:
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opno = XINT (part, 0);
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if (opno > max_opno)
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max_opno = opno;
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if (max_opno >= MAX_MAX_OPERANDS)
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{
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error ("Too many operands (%d) in definition %d.\n",
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max_opno + 1, next_index_number);
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return;
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}
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if (seen[opno])
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error ("Definition %d specified operand number %d more than once.\n",
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next_index_number, opno);
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seen[opno] = 1;
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modes[opno] = GET_MODE (part);
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strict_low[opno] = 0;
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predicates[opno] = "scratch_operand";
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constraints[opno] = XSTR (part, 1);
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if (XSTR (part, 1) != 0 && *XSTR (part, 1) != 0)
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{
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op_n_alternatives[opno] = n_occurrences (',', XSTR (part, 1)) + 1;
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have_constraints = 1;
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}
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address_p[opno] = 0;
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return;
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case MATCH_OPERATOR:
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case MATCH_PARALLEL:
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opno = XINT (part, 0);
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if (opno > max_opno)
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max_opno = opno;
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if (max_opno >= MAX_MAX_OPERANDS)
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{
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error ("Too many operands (%d) in definition %d.\n",
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max_opno + 1, next_index_number);
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return;
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}
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if (seen[opno])
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error ("Definition %d specified operand number %d more than once.\n",
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next_index_number, opno);
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seen[opno] = 1;
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modes[opno] = GET_MODE (part);
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strict_low[opno] = 0;
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predicates[opno] = XSTR (part, 1);
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constraints[opno] = 0;
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address_p[opno] = 0;
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for (i = 0; i < XVECLEN (part, 2); i++)
|
||
scan_operands (XVECEXP (part, 2, i), 0, 0);
|
||
return;
|
||
|
||
case MATCH_DUP:
|
||
case MATCH_OP_DUP:
|
||
case MATCH_PAR_DUP:
|
||
++num_dups;
|
||
return;
|
||
|
||
case ADDRESS:
|
||
scan_operands (XEXP (part, 0), 1, 0);
|
||
return;
|
||
|
||
case STRICT_LOW_PART:
|
||
scan_operands (XEXP (part, 0), 0, 1);
|
||
return;
|
||
}
|
||
|
||
format_ptr = GET_RTX_FORMAT (GET_CODE (part));
|
||
|
||
for (i = 0; i < GET_RTX_LENGTH (GET_CODE (part)); i++)
|
||
switch (*format_ptr++)
|
||
{
|
||
case 'e':
|
||
scan_operands (XEXP (part, i), 0, 0);
|
||
break;
|
||
case 'E':
|
||
if (XVEC (part, i) != NULL)
|
||
for (j = 0; j < XVECLEN (part, i); j++)
|
||
scan_operands (XVECEXP (part, i, j), 0, 0);
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Process an assembler template from a define_insn or a define_peephole.
|
||
It is either the assembler code template, a list of assembler code
|
||
templates, or C code to generate the assembler code template. */
|
||
|
||
static void
|
||
process_template (d, template)
|
||
struct data *d;
|
||
char *template;
|
||
{
|
||
register char *cp;
|
||
register int i;
|
||
|
||
/* We need to consider only the instructions whose assembler code template
|
||
starts with a * or @. These are the ones where C code is run to decide
|
||
on a template to use. So for all others just return now. */
|
||
|
||
if (template[0] != '*' && template[0] != '@')
|
||
{
|
||
d->template = template;
|
||
d->outfun = 0;
|
||
return;
|
||
}
|
||
|
||
d->template = 0;
|
||
d->outfun = 1;
|
||
|
||
printf ("\nstatic char *\n");
|
||
printf ("output_%d (operands, insn)\n", d->code_number);
|
||
printf (" rtx *operands;\n");
|
||
printf (" rtx insn;\n");
|
||
printf ("{\n");
|
||
|
||
/* If the assembler code template starts with a @ it is a newline-separated
|
||
list of assembler code templates, one for each alternative. So produce
|
||
a routine to select the correct one. */
|
||
|
||
if (template[0] == '@')
|
||
{
|
||
|
||
printf (" static /*const*/ char *const strings_%d[] = {\n",
|
||
d->code_number);
|
||
|
||
for (i = 0, cp = &template[1]; *cp; )
|
||
{
|
||
while (*cp == '\n' || *cp == ' ' || *cp== '\t')
|
||
cp++;
|
||
|
||
printf (" \"");
|
||
while (*cp != '\n' && *cp != '\0')
|
||
{
|
||
putchar (*cp);
|
||
cp++;
|
||
}
|
||
|
||
printf ("\",\n");
|
||
i++;
|
||
}
|
||
|
||
printf (" };\n");
|
||
printf (" return strings_%d[which_alternative];\n", d->code_number);
|
||
|
||
if (i != d->n_alternatives)
|
||
fatal ("Insn pattern %d has %d alternatives but %d assembler choices",
|
||
d->index_number, d->n_alternatives, i);
|
||
|
||
}
|
||
else
|
||
{
|
||
/* The following is done in a funny way to get around problems in
|
||
VAX-11 "C" on VMS. It is the equivalent of:
|
||
printf ("%s\n", &template[1])); */
|
||
cp = &template[1];
|
||
while (*cp)
|
||
{
|
||
putchar (*cp);
|
||
cp++;
|
||
}
|
||
putchar ('\n');
|
||
}
|
||
|
||
printf ("}\n");
|
||
}
|
||
|
||
/* Check insn D for consistency in number of constraint alternatives. */
|
||
|
||
static void
|
||
validate_insn_alternatives (d)
|
||
struct data *d;
|
||
{
|
||
register int n = 0, start;
|
||
/* Make sure all the operands have the same number of
|
||
alternatives in their constraints.
|
||
Let N be that number. */
|
||
for (start = 0; start < d->n_operands; start++)
|
||
if (d->op_n_alternatives[start] > 0)
|
||
{
|
||
if (n == 0)
|
||
n = d->op_n_alternatives[start];
|
||
else if (n != d->op_n_alternatives[start])
|
||
error ("wrong number of alternatives in operand %d of insn number %d",
|
||
start, d->index_number);
|
||
}
|
||
/* Record the insn's overall number of alternatives. */
|
||
d->n_alternatives = n;
|
||
}
|
||
|
||
/* Look at a define_insn just read. Assign its code number.
|
||
Record on insn_data the template and the number of arguments.
|
||
If the insn has a hairy output action, output a function for now. */
|
||
|
||
static void
|
||
gen_insn (insn)
|
||
rtx insn;
|
||
{
|
||
register struct data *d = (struct data *) xmalloc (sizeof (struct data));
|
||
register int i;
|
||
|
||
d->code_number = next_code_number++;
|
||
d->index_number = next_index_number;
|
||
if (XSTR (insn, 0)[0])
|
||
d->name = XSTR (insn, 0);
|
||
else
|
||
d->name = 0;
|
||
|
||
/* Build up the list in the same order as the insns are seen
|
||
in the machine description. */
|
||
d->next = 0;
|
||
if (end_of_insn_data)
|
||
end_of_insn_data->next = d;
|
||
else
|
||
insn_data = d;
|
||
|
||
end_of_insn_data = d;
|
||
|
||
max_opno = -1;
|
||
num_dups = 0;
|
||
|
||
mybzero (constraints, sizeof constraints);
|
||
mybzero (op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (predicates, sizeof predicates);
|
||
mybzero (address_p, sizeof address_p);
|
||
mybzero (modes, sizeof modes);
|
||
mybzero (strict_low, sizeof strict_low);
|
||
mybzero (seen, sizeof seen);
|
||
|
||
for (i = 0; i < XVECLEN (insn, 1); i++)
|
||
scan_operands (XVECEXP (insn, 1, i), 0, 0);
|
||
|
||
d->n_operands = max_opno + 1;
|
||
d->n_dups = num_dups;
|
||
|
||
mybcopy (constraints, d->constraints, sizeof constraints);
|
||
mybcopy (op_n_alternatives, d->op_n_alternatives, sizeof op_n_alternatives);
|
||
mybcopy (predicates, d->predicates, sizeof predicates);
|
||
mybcopy (address_p, d->address_p, sizeof address_p);
|
||
mybcopy (modes, d->modes, sizeof modes);
|
||
mybcopy (strict_low, d->strict_low, sizeof strict_low);
|
||
|
||
validate_insn_alternatives (d);
|
||
process_template (d, XSTR (insn, 3));
|
||
}
|
||
|
||
/* Look at a define_peephole just read. Assign its code number.
|
||
Record on insn_data the template and the number of arguments.
|
||
If the insn has a hairy output action, output it now. */
|
||
|
||
static void
|
||
gen_peephole (peep)
|
||
rtx peep;
|
||
{
|
||
register struct data *d = (struct data *) xmalloc (sizeof (struct data));
|
||
register int i;
|
||
|
||
d->code_number = next_code_number++;
|
||
d->index_number = next_index_number;
|
||
d->name = 0;
|
||
|
||
/* Build up the list in the same order as the insns are seen
|
||
in the machine description. */
|
||
d->next = 0;
|
||
if (end_of_insn_data)
|
||
end_of_insn_data->next = d;
|
||
else
|
||
insn_data = d;
|
||
|
||
end_of_insn_data = d;
|
||
|
||
max_opno = -1;
|
||
mybzero (constraints, sizeof constraints);
|
||
mybzero (op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (predicates, sizeof predicates);
|
||
mybzero (address_p, sizeof address_p);
|
||
mybzero (modes, sizeof modes);
|
||
mybzero (strict_low, sizeof strict_low);
|
||
mybzero (seen, sizeof seen);
|
||
|
||
/* Get the number of operands by scanning all the
|
||
patterns of the peephole optimizer.
|
||
But ignore all the rest of the information thus obtained. */
|
||
for (i = 0; i < XVECLEN (peep, 0); i++)
|
||
scan_operands (XVECEXP (peep, 0, i), 0, 0);
|
||
|
||
d->n_operands = max_opno + 1;
|
||
d->n_dups = 0;
|
||
|
||
mybcopy (constraints, d->constraints, sizeof constraints);
|
||
mybcopy (op_n_alternatives, d->op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (d->predicates, sizeof predicates);
|
||
mybzero (d->address_p, sizeof address_p);
|
||
mybzero (d->modes, sizeof modes);
|
||
mybzero (d->strict_low, sizeof strict_low);
|
||
|
||
validate_insn_alternatives (d);
|
||
process_template (d, XSTR (peep, 2));
|
||
}
|
||
|
||
/* Process a define_expand just read. Assign its code number,
|
||
only for the purposes of `insn_gen_function'. */
|
||
|
||
static void
|
||
gen_expand (insn)
|
||
rtx insn;
|
||
{
|
||
register struct data *d = (struct data *) xmalloc (sizeof (struct data));
|
||
register int i;
|
||
|
||
d->code_number = next_code_number++;
|
||
d->index_number = next_index_number;
|
||
if (XSTR (insn, 0)[0])
|
||
d->name = XSTR (insn, 0);
|
||
else
|
||
d->name = 0;
|
||
|
||
/* Build up the list in the same order as the insns are seen
|
||
in the machine description. */
|
||
d->next = 0;
|
||
if (end_of_insn_data)
|
||
end_of_insn_data->next = d;
|
||
else
|
||
insn_data = d;
|
||
|
||
end_of_insn_data = d;
|
||
|
||
max_opno = -1;
|
||
num_dups = 0;
|
||
|
||
/* Scan the operands to get the specified predicates and modes,
|
||
since expand_binop needs to know them. */
|
||
|
||
mybzero (constraints, sizeof constraints);
|
||
mybzero (op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (predicates, sizeof predicates);
|
||
mybzero (address_p, sizeof address_p);
|
||
mybzero (modes, sizeof modes);
|
||
mybzero (strict_low, sizeof strict_low);
|
||
mybzero (seen, sizeof seen);
|
||
|
||
if (XVEC (insn, 1))
|
||
for (i = 0; i < XVECLEN (insn, 1); i++)
|
||
scan_operands (XVECEXP (insn, 1, i), 0, 0);
|
||
|
||
d->n_operands = max_opno + 1;
|
||
d->n_dups = num_dups;
|
||
|
||
mybcopy (constraints, d->constraints, sizeof constraints);
|
||
mybcopy (op_n_alternatives, d->op_n_alternatives, sizeof op_n_alternatives);
|
||
mybcopy (predicates, d->predicates, sizeof predicates);
|
||
mybcopy (address_p, d->address_p, sizeof address_p);
|
||
mybcopy (modes, d->modes, sizeof modes);
|
||
mybcopy (strict_low, d->strict_low, sizeof strict_low);
|
||
|
||
d->template = 0;
|
||
d->outfun = 0;
|
||
validate_insn_alternatives (d);
|
||
}
|
||
|
||
/* Process a define_split just read. Assign its code number,
|
||
only for reasons of consistency and to simplify genrecog. */
|
||
|
||
|
||
static void
|
||
gen_split (split)
|
||
rtx split;
|
||
{
|
||
register struct data *d = (struct data *) xmalloc (sizeof (struct data));
|
||
register int i;
|
||
|
||
d->code_number = next_code_number++;
|
||
d->index_number = next_index_number;
|
||
d->name = 0;
|
||
|
||
/* Build up the list in the same order as the insns are seen
|
||
in the machine description. */
|
||
d->next = 0;
|
||
if (end_of_insn_data)
|
||
end_of_insn_data->next = d;
|
||
else
|
||
insn_data = d;
|
||
|
||
end_of_insn_data = d;
|
||
|
||
max_opno = -1;
|
||
num_dups = 0;
|
||
|
||
mybzero (constraints, sizeof constraints);
|
||
mybzero (op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (predicates, sizeof predicates);
|
||
mybzero (address_p, sizeof address_p);
|
||
mybzero (modes, sizeof modes);
|
||
mybzero (strict_low, sizeof strict_low);
|
||
mybzero (seen, sizeof seen);
|
||
|
||
/* Get the number of operands by scanning all the
|
||
patterns of the split patterns.
|
||
But ignore all the rest of the information thus obtained. */
|
||
for (i = 0; i < XVECLEN (split, 0); i++)
|
||
scan_operands (XVECEXP (split, 0, i), 0, 0);
|
||
|
||
d->n_operands = max_opno + 1;
|
||
|
||
mybzero (d->constraints, sizeof constraints);
|
||
mybzero (d->op_n_alternatives, sizeof op_n_alternatives);
|
||
mybzero (d->predicates, sizeof predicates);
|
||
mybzero (d->address_p, sizeof address_p);
|
||
mybzero (d->modes, sizeof modes);
|
||
mybzero (d->strict_low, sizeof strict_low);
|
||
|
||
d->n_dups = 0;
|
||
d->n_alternatives = 0;
|
||
d->template = 0;
|
||
d->outfun = 0;
|
||
}
|
||
|
||
char *
|
||
xmalloc (size)
|
||
unsigned size;
|
||
{
|
||
register char *val = (char *) malloc (size);
|
||
|
||
if (val == 0)
|
||
fatal ("virtual memory exhausted");
|
||
return val;
|
||
}
|
||
|
||
char *
|
||
xrealloc (ptr, size)
|
||
char *ptr;
|
||
unsigned size;
|
||
{
|
||
char *result = (char *) realloc (ptr, size);
|
||
if (!result)
|
||
fatal ("virtual memory exhausted");
|
||
return result;
|
||
}
|
||
|
||
static void
|
||
mybzero (b, length)
|
||
register char *b;
|
||
register unsigned length;
|
||
{
|
||
while (length-- > 0)
|
||
*b++ = 0;
|
||
}
|
||
|
||
static void
|
||
mybcopy (b1, b2, length)
|
||
register char *b1;
|
||
register char *b2;
|
||
register unsigned length;
|
||
{
|
||
while (length-- > 0)
|
||
*b2++ = *b1++;
|
||
}
|
||
|
||
static void
|
||
fatal (s, a1, a2, a3, a4)
|
||
char *s;
|
||
{
|
||
fprintf (stderr, "genoutput: ");
|
||
fprintf (stderr, s, a1, a2, a3, a4);
|
||
fprintf (stderr, "\n");
|
||
exit (FATAL_EXIT_CODE);
|
||
}
|
||
|
||
/* More 'friendly' abort that prints the line and file.
|
||
config.h can #define abort fancy_abort if you like that sort of thing. */
|
||
|
||
void
|
||
fancy_abort ()
|
||
{
|
||
fatal ("Internal gcc abort.");
|
||
}
|
||
|
||
static void
|
||
error (s, a1, a2)
|
||
char *s;
|
||
{
|
||
fprintf (stderr, "genoutput: ");
|
||
fprintf (stderr, s, a1, a2);
|
||
fprintf (stderr, "\n");
|
||
|
||
have_error = 1;
|
||
}
|
||
|
||
int
|
||
main (argc, argv)
|
||
int argc;
|
||
char **argv;
|
||
{
|
||
rtx desc;
|
||
FILE *infile;
|
||
register int c;
|
||
|
||
obstack_init (rtl_obstack);
|
||
|
||
if (argc <= 1)
|
||
fatal ("No input file name.");
|
||
|
||
infile = fopen (argv[1], "r");
|
||
if (infile == 0)
|
||
{
|
||
perror (argv[1]);
|
||
exit (FATAL_EXIT_CODE);
|
||
}
|
||
|
||
init_rtl ();
|
||
|
||
output_prologue ();
|
||
next_code_number = 0;
|
||
next_index_number = 0;
|
||
have_constraints = 0;
|
||
|
||
/* Read the machine description. */
|
||
|
||
while (1)
|
||
{
|
||
c = read_skip_spaces (infile);
|
||
if (c == EOF)
|
||
break;
|
||
ungetc (c, infile);
|
||
|
||
desc = read_rtx (infile);
|
||
if (GET_CODE (desc) == DEFINE_INSN)
|
||
gen_insn (desc);
|
||
if (GET_CODE (desc) == DEFINE_PEEPHOLE)
|
||
gen_peephole (desc);
|
||
if (GET_CODE (desc) == DEFINE_EXPAND)
|
||
gen_expand (desc);
|
||
if (GET_CODE (desc) == DEFINE_SPLIT)
|
||
gen_split (desc);
|
||
next_index_number++;
|
||
}
|
||
|
||
output_epilogue ();
|
||
|
||
fflush (stdout);
|
||
exit (ferror (stdout) != 0 || have_error
|
||
? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
|
||
|
||
/* NOTREACHED */
|
||
return 0;
|
||
}
|
||
|
||
static int
|
||
n_occurrences (c, s)
|
||
int c;
|
||
char *s;
|
||
{
|
||
int n = 0;
|
||
while (*s)
|
||
n += (*s++ == c);
|
||
return n;
|
||
}
|