189 lines
6.4 KiB
ArmAsm
189 lines
6.4 KiB
ArmAsm
/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Header: umul.s,v 1.4 92/06/25 13:24:05 torek Exp
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* $NetBSD: umul.S,v 1.4 1997/10/13 11:58:29 lukem Exp $
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*/
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#if defined(LIBC_SCCS) && !defined(lint)
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.asciz "@(#)umul.s 8.1 (Berkeley) 6/4/93"
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#endif /* LIBC_SCCS and not lint */
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/*
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* Unsigned multiply. Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the
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* upper 32 bits of the 64-bit product).
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*
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* This code optimizes short (less than 13-bit) multiplies. Short
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* multiplies require 25 instruction cycles, and long ones require
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* 45 instruction cycles.
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*
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* On return, overflow has occurred (%o1 is not zero) if and only if
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* the Z condition code is clear, allowing, e.g., the following:
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*
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* call .umul
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* nop
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* bnz overflow (or tnz)
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*/
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#include <machine/asm.h>
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FUNC(.umul)
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or %o0, %o1, %o4
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mov %o0, %y ! multiplier -> Y
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andncc %o4, 0xfff, %g0 ! test bits 12..31 of *both* args
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be Lmul_shortway ! if zero, can do it the short way
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andcc %g0, %g0, %o4 ! zero the partial product and clear N and V
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/*
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* Long multiply. 32 steps, followed by a final shift step.
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*/
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mulscc %o4, %o1, %o4 ! 1
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mulscc %o4, %o1, %o4 ! 2
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mulscc %o4, %o1, %o4 ! 3
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mulscc %o4, %o1, %o4 ! 4
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mulscc %o4, %o1, %o4 ! 5
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mulscc %o4, %o1, %o4 ! 6
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mulscc %o4, %o1, %o4 ! 7
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mulscc %o4, %o1, %o4 ! 8
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mulscc %o4, %o1, %o4 ! 9
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mulscc %o4, %o1, %o4 ! 10
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mulscc %o4, %o1, %o4 ! 11
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mulscc %o4, %o1, %o4 ! 12
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mulscc %o4, %o1, %o4 ! 13
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mulscc %o4, %o1, %o4 ! 14
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mulscc %o4, %o1, %o4 ! 15
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mulscc %o4, %o1, %o4 ! 16
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mulscc %o4, %o1, %o4 ! 17
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mulscc %o4, %o1, %o4 ! 18
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mulscc %o4, %o1, %o4 ! 19
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mulscc %o4, %o1, %o4 ! 20
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mulscc %o4, %o1, %o4 ! 21
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mulscc %o4, %o1, %o4 ! 22
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mulscc %o4, %o1, %o4 ! 23
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mulscc %o4, %o1, %o4 ! 24
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mulscc %o4, %o1, %o4 ! 25
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mulscc %o4, %o1, %o4 ! 26
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mulscc %o4, %o1, %o4 ! 27
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mulscc %o4, %o1, %o4 ! 28
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mulscc %o4, %o1, %o4 ! 29
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mulscc %o4, %o1, %o4 ! 30
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mulscc %o4, %o1, %o4 ! 31
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mulscc %o4, %o1, %o4 ! 32
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mulscc %o4, %g0, %o4 ! final shift
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/*
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* Normally, with the shift-and-add approach, if both numbers are
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* positive you get the correct result. WIth 32-bit two's-complement
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* numbers, -x is represented as
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*
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* x 32
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* ( 2 - ------ ) mod 2 * 2
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* 32
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* 2
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*
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* (the `mod 2' subtracts 1 from 1.bbbb). To avoid lots of 2^32s,
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* we can treat this as if the radix point were just to the left
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* of the sign bit (multiply by 2^32), and get
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*
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* -x = (2 - x) mod 2
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*
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* Then, ignoring the `mod 2's for convenience:
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*
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* x * y = xy
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* -x * y = 2y - xy
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* x * -y = 2x - xy
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* -x * -y = 4 - 2x - 2y + xy
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*
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* For signed multiplies, we subtract (x << 32) from the partial
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* product to fix this problem for negative multipliers (see mul.s).
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* Because of the way the shift into the partial product is calculated
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* (N xor V), this term is automatically removed for the multiplicand,
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* so we don't have to adjust.
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*
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* But for unsigned multiplies, the high order bit wasn't a sign bit,
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* and the correction is wrong. So for unsigned multiplies where the
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* high order bit is one, we end up with xy - (y << 32). To fix it
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* we add y << 32.
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*/
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tst %o1
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bl,a 1f ! if %o1 < 0 (high order bit = 1),
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add %o4, %o0, %o4 ! %o4 += %o0 (add y to upper half)
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1: rd %y, %o0 ! get lower half of product
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retl
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addcc %o4, %g0, %o1 ! put upper half in place and set Z for %o1==0
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Lmul_shortway:
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/*
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* Short multiply. 12 steps, followed by a final shift step.
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* The resulting bits are off by 12 and (32-12) = 20 bit positions,
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* but there is no problem with %o0 being negative (unlike above),
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* and overflow is impossible (the answer is at most 24 bits long).
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*/
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mulscc %o4, %o1, %o4 ! 1
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mulscc %o4, %o1, %o4 ! 2
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mulscc %o4, %o1, %o4 ! 3
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mulscc %o4, %o1, %o4 ! 4
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mulscc %o4, %o1, %o4 ! 5
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mulscc %o4, %o1, %o4 ! 6
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mulscc %o4, %o1, %o4 ! 7
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mulscc %o4, %o1, %o4 ! 8
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mulscc %o4, %o1, %o4 ! 9
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mulscc %o4, %o1, %o4 ! 10
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mulscc %o4, %o1, %o4 ! 11
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mulscc %o4, %o1, %o4 ! 12
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mulscc %o4, %g0, %o4 ! final shift
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/*
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* %o4 has 20 of the bits that should be in the result; %y has
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* the bottom 12 (as %y's top 12). That is:
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*
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* %o4 %y
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* +----------------+----------------+
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* | -12- | -20- | -12- | -20- |
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* +------(---------+------)---------+
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* -----result-----
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*
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* The 12 bits of %o4 left of the `result' area are all zero;
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* in fact, all top 20 bits of %o4 are zero.
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*/
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rd %y, %o5
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sll %o4, 12, %o0 ! shift middle bits left 12
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srl %o5, 20, %o5 ! shift low bits right 20
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or %o5, %o0, %o0
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retl
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addcc %g0, %g0, %o1 ! %o1 = zero, and set Z
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