12e9b90f9f
16 instead of 24. Set 'fb.depth=16' or 'fb.depth=24' on kernel command-line to explicitly select a colour depth.
683 lines
21 KiB
C
683 lines
21 KiB
C
/* $NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $ */
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/*
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* Machine dependent functions for kernel setup for TI OSK5912 board.
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* Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c
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*
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* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec Corporation may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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* Copyright (c) 1997,1998 Causality Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Microsoft
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $");
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#include "opt_machdep.h"
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#include "opt_ddb.h"
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#include "opt_md.h"
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#include "opt_amlogic.h"
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#include "opt_arm_debug.h"
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#include "opt_multiprocessor.h"
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#include "amlogic_com.h"
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#include "arml2cc.h"
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#include "ukbd.h"
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#include "genfb.h"
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#include "ether.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/atomic.h>
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#include <sys/cpu.h>
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#include <sys/device.h>
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#include <sys/exec.h>
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#include <sys/kernel.h>
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#include <sys/ksyms.h>
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#include <sys/msgbuf.h>
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#include <sys/proc.h>
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#include <sys/reboot.h>
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#include <sys/termios.h>
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#include <sys/gpio.h>
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#include <uvm/uvm_extern.h>
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#include <sys/conf.h>
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#include <dev/cons.h>
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#include <dev/md.h>
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#include <machine/db_machdep.h>
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#include <ddb/db_sym.h>
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#include <ddb/db_extern.h>
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#include <machine/bootconfig.h>
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#include <arm/armreg.h>
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#include <arm/undefined.h>
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#include <arm/arm32/machdep.h>
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#include <arm/mainbus/mainbus.h>
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#include <arm/amlogic/amlogic_reg.h>
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#include <arm/amlogic/amlogic_crureg.h>
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#include <arm/amlogic/amlogic_var.h>
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#include <arm/amlogic/amlogic_comreg.h>
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#include <arm/amlogic/amlogic_comvar.h>
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#include <arm/cortex/pl310_reg.h>
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#include <arm/cortex/scu_reg.h>
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#include <arm/cortex/a9tmr_var.h>
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#include <arm/cortex/pl310_var.h>
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#include <arm/cortex/gtmr_var.h>
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#include <evbarm/include/autoconf.h>
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#include <evbarm/amlogic/platform.h>
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#include <dev/usb/ukbdvar.h>
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#include <net/if_ether.h>
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#ifndef AMLOGIC_MAX_BOOT_STRING
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#define AMLOGIC_MAX_BOOT_STRING 1024
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#endif
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BootConfig bootconfig; /* Boot config storage */
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static char bootargs[AMLOGIC_MAX_BOOT_STRING];
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char *boot_args = NULL;
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char *boot_file = NULL;
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u_int uboot_args[4] = { 0 }; /* filled in by amlogic_start.S (not in bss) */
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/* Same things, but for the free (unused by the kernel) memory. */
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extern char KERNEL_BASE_phys[];
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extern char _end[];
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/*
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* Macros to translate between physical and virtual for a subset of the
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* kernel address space. *Not* for general use.
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*/
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#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
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#define AMLOGIC_CORE_VOFFSET (AMLOGIC_CORE_VBASE - AMLOGIC_CORE_BASE)
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/* Prototypes */
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void consinit(void);
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static void amlogic_device_register(device_t, void *);
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static void amlogic_reset(void);
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bs_protos(bs_notimpl);
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/*
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* Static device mappings. These peripheral registers are mapped at
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* fixed virtual addresses very early in initarm() so that we can use
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* them while booting the kernel, and stay at the same address
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* throughout whole kernel's life time.
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*
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* We use this table twice; once with bootstrap page table, and once
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* with kernel's page table which we build up in initarm().
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*
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* Since we map these registers into the bootstrap page table using
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* pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
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* registers segment-aligned and segment-rounded in order to avoid
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* using the 2nd page tables.
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*/
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#define _A(a) ((a) & ~L1_S_OFFSET)
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#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
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static const struct pmap_devmap devmap[] = {
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{
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.pd_va = _A(AMLOGIC_CORE_VBASE),
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.pd_pa = _A(AMLOGIC_CORE_BASE),
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.pd_size = _S(AMLOGIC_CORE_SIZE),
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.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
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.pd_cache = PTE_NOCACHE
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},
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{0}
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};
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#undef _A
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#undef _S
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#ifdef DDB
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static void
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amlogic_db_trap(int where)
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{
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/* NOT YET */
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}
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#endif
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#ifdef VERBOSE_INIT_ARM
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static void
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amlogic_putchar(char c)
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{
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volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA;
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int timo = 150000;
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while ((uartaddr[UART_STATUS_REG/4] & UART_STATUS_TX_EMPTY) == 0) {
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if (--timo == 0)
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break;
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}
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uartaddr[UART_WFIFO_REG/4] = c;
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while ((uartaddr[UART_STATUS_REG/4] & UART_STATUS_TX_EMPTY) == 0) {
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if (--timo == 0)
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break;
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}
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}
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static void
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amlogic_putstr(const char *s)
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{
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for (const char *p = s; *p; p++) {
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amlogic_putchar(*p);
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}
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}
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#define DPRINTF(...) printf(__VA_ARGS__)
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#define DPRINT(x) amlogic_putstr(x)
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#else
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#define DPRINTF(...)
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#define DPRINT(x)
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#endif
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static psize_t
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amlogic_get_ram_size(void)
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{
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const bus_space_handle_t ao_bsh =
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AMLOGIC_CORE_VBASE + AMLOGIC_SRAM_OFFSET;
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return bus_space_read_4(&armv7_generic_bs_tag, ao_bsh, 0) << 20;
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}
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/*
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* u_int initarm(...)
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*
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* Initial entry point on startup. This gets called before main() is
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* entered.
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* It should be responsible for setting up everything that must be
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* in place when main is called.
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* This includes
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* Taking a copy of the boot configuration structure.
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* Initialising the physical console so characters can be printed.
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* Setting up page tables for the kernel
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* Relocating the kernel to the bottom of physical memory
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*/
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u_int
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initarm(void *arg)
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{
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psize_t ram_size = 0;
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DPRINT("initarm:");
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DPRINT(" devmap");
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pmap_devmap_register(devmap);
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DPRINT(" bootstrap");
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amlogic_bootstrap();
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#ifdef MULTIPROCESSOR
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DPRINT(" ncpu");
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const bus_addr_t cbar = armreg_cbar_read();
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if (cbar) {
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const bus_space_handle_t scu_bsh =
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cbar - AMLOGIC_CORE_BASE + AMLOGIC_CORE_VBASE;
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uint32_t scu_cfg = bus_space_read_4(&armv7_generic_bs_tag,
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scu_bsh, SCU_CFG);
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arm_cpu_max = (scu_cfg & SCU_CFG_CPUMAX) + 1;
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membar_producer();
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}
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#endif
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/* Heads up ... Setup the CPU / MMU / TLB functions. */
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DPRINT(" cpufunc");
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if (set_cpufuncs())
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panic("cpu not recognized!");
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DPRINT(" consinit");
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consinit();
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#if NARML2CC > 0
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/*
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* Probe the PL310 L2CC
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*/
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DPRINTF(" l2cc");
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const bus_space_handle_t pl310_bh =
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AMLOGIC_CORE_VBASE + AMLOGIC_PL310_OFFSET;
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arml2cc_init(&armv7_generic_bs_tag, pl310_bh, 0);
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#endif
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DPRINTF(" cbar=%#x", armreg_cbar_read());
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DPRINTF(" ok\n");
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DPRINTF("uboot: args %#x, %#x, %#x, %#x\n",
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uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
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cpu_reset_address = amlogic_reset;
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/* Talk to the user */
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DPRINTF("\nNetBSD/evbarm (amlogic) booting ...\n");
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#ifdef BOOT_ARGS
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char mi_bootargs[] = BOOT_ARGS;
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parse_mi_bootargs(mi_bootargs);
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#endif
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DPRINTF("KERNEL_BASE=0x%x, KERNEL_VM_BASE=0x%x, KERNEL_VM_BASE - KERNEL_BASE=0x%x, KERNEL_BASE_VOFFSET=0x%x\n",
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KERNEL_BASE, KERNEL_VM_BASE, KERNEL_VM_BASE - KERNEL_BASE, KERNEL_BASE_VOFFSET);
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ram_size = amlogic_get_ram_size();
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#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
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printf("%s: dropping RAM size from %luMB to %uMB\n",
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__func__, (unsigned long) (ram_size >> 20),
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(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
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ram_size = KERNEL_VM_BASE - KERNEL_BASE;
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}
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#endif
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/*
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* If MEMSIZE specified less than what we really have, limit ourselves
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* to that.
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*/
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#ifdef MEMSIZE
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if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
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ram_size = (unsigned)MEMSIZE * 1024 * 1024;
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DPRINTF("ram_size = 0x%x\n", (int)ram_size);
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#else
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KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
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#endif
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/* Fake bootconfig structure for the benefit of pmap.c. */
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bootconfig.dramblocks = 1;
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bootconfig.dram[0].address = 0x00000000; /* DDR PHY addr */
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bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
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#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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const bool mapallmem_p = true;
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KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
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#else
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const bool mapallmem_p = false;
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#endif
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KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
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arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
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KERNEL_BASE_PHYS);
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arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
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mapallmem_p);
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if (mapallmem_p) {
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if (uboot_args[3] < ram_size) {
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const char * const args = (const char *)
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(uboot_args[3] + KERNEL_BASE_VOFFSET);
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strlcpy(bootargs, args, sizeof(bootargs));
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}
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}
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DPRINTF("bootargs: %s\n", bootargs);
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boot_args = bootargs;
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parse_mi_bootargs(boot_args);
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/* we've a specific device_register routine */
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evbarm_device_register = amlogic_device_register;
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db_trap_callback = amlogic_db_trap;
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amlogic_cpufreq_bootstrap();
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return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
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}
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#if NAMLOGIC_COM > 0
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#ifndef CONSADDR
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#error Specify the address of the console UART with the CONSADDR option.
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#endif
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#ifndef CONSPEED
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#define CONSPEED 115200
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#endif
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#ifndef CONMODE
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#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
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#endif
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static const bus_addr_t consaddr = CONSADDR;
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static const int conspeed = CONSPEED;
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static const int conmode = CONMODE;
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#endif
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void
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consinit(void)
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{
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static int consinit_called = 0;
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if (consinit_called != 0)
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return;
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consinit_called = 1;
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#if NAMLOGIC_COM > 0
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const bus_space_handle_t bsh =
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AMLOGIC_CORE_VBASE + (consaddr - AMLOGIC_CORE_BASE);
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amlogic_com_cnattach(&armv7_generic_bs_tag, bsh, conspeed, conmode);
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|
#else
|
|
#error only UART console is supported
|
|
#endif
|
|
}
|
|
|
|
void
|
|
amlogic_reset(void)
|
|
{
|
|
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
|
bus_space_handle_t bsh = amlogic_core_bsh;
|
|
bus_size_t off = AMLOGIC_CBUS_OFFSET;
|
|
|
|
bus_space_write_4(bst, bsh, off + WATCHDOG_TC_REG,
|
|
WATCHDOG_TC_CPUS | WATCHDOG_TC_ENABLE | 0xfff);
|
|
bus_space_write_4(bst, bsh, off + WATCHDOG_RESET_REG, 0);
|
|
|
|
for (;;) {
|
|
__asm("wfi");
|
|
}
|
|
}
|
|
|
|
void
|
|
amlogic_device_register(device_t self, void *aux)
|
|
{
|
|
prop_dictionary_t dict = device_properties(self);
|
|
|
|
if (device_is_a(self, "armperiph")
|
|
&& device_is_a(device_parent(self), "mainbus")) {
|
|
struct mainbus_attach_args * const mb = aux;
|
|
mb->mb_iot = &armv7_generic_bs_tag;
|
|
return;
|
|
}
|
|
|
|
if (device_is_a(self, "cpu") && device_unit(self) == 0) {
|
|
amlogic_cpufreq_init();
|
|
}
|
|
|
|
/*
|
|
* We need to tell the A9 Global/Watchdog Timer
|
|
* what frequency it runs at.
|
|
*/
|
|
if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
|
|
prop_dictionary_set_uint32(dict, "frequency",
|
|
amlogic_get_rate_a9periph());
|
|
|
|
return;
|
|
}
|
|
|
|
if (device_is_a(self, "arml2cc")) {
|
|
/*
|
|
* L2 cache regs are at C4200000 and A9 periph base is
|
|
* at C4300000; pass as a negative offset for the benefit
|
|
* of armperiph bus.
|
|
*/
|
|
prop_dictionary_set_uint32(dict, "offset", 0xfff00000);
|
|
}
|
|
|
|
if (device_is_a(self, "awge") && device_unit(self) == 0) {
|
|
uint8_t enaddr[ETHER_ADDR_LEN];
|
|
if (get_bootconf_option(boot_args, "awge0.mac-address",
|
|
BOOTOPT_TYPE_MACADDR, enaddr)) {
|
|
prop_data_t pd = prop_data_create_data(enaddr,
|
|
sizeof(enaddr));
|
|
prop_dictionary_set(dict, "mac-address", pd);
|
|
prop_object_release(pd);
|
|
}
|
|
}
|
|
|
|
#if NGENFB > 0
|
|
if (device_is_a(self, "genfb")) {
|
|
char *ptr;
|
|
int scale, depth;
|
|
amlogic_genfb_set_console_dev(self);
|
|
#ifdef DDB
|
|
db_trap_callback = amlogic_genfb_ddb_trap_callback;
|
|
#endif
|
|
if (get_bootconf_option(boot_args, "console",
|
|
BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
|
|
prop_dictionary_set_bool(dict, "is_console", true);
|
|
#if NUKBD > 0
|
|
ukbd_cnattach();
|
|
#endif
|
|
} else {
|
|
prop_dictionary_set_bool(dict, "is_console", false);
|
|
}
|
|
if (get_bootconf_option(boot_args, "fb.scale",
|
|
BOOTOPT_TYPE_INT, &scale) && scale > 0) {
|
|
prop_dictionary_set_uint32(dict, "scale", scale);
|
|
}
|
|
if (get_bootconf_option(boot_args, "fb.depth",
|
|
BOOTOPT_TYPE_INT, &depth)) {
|
|
prop_dictionary_set_uint32(dict, "depth", depth);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#if defined(MULTIPROCESSOR)
|
|
void amlogic_mpinit(uint32_t);
|
|
|
|
static void
|
|
amlogic_mpinit_delay(u_int n)
|
|
{
|
|
for (volatile int i = 0; i < n; i++)
|
|
;
|
|
}
|
|
|
|
static void
|
|
amlogic_mpinit_cpu(int cpu)
|
|
{
|
|
const bus_addr_t cbar = armreg_cbar_read();
|
|
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
|
const bus_space_handle_t scu_bsh =
|
|
cbar - AMLOGIC_CORE_BASE + AMLOGIC_CORE_VBASE;
|
|
const bus_space_handle_t ao_bsh =
|
|
AMLOGIC_CORE_VBASE + AMLOGIC_AOBUS_OFFSET;
|
|
const bus_space_handle_t cbus_bsh =
|
|
AMLOGIC_CORE_VBASE + AMLOGIC_CBUS_OFFSET;
|
|
uint32_t pwr_sts, pwr_cntl0, pwr_cntl1, cpuclk, mempd0;
|
|
|
|
pwr_sts = bus_space_read_4(bst, scu_bsh, SCU_CPU_PWR_STS);
|
|
pwr_sts &= ~(3 << (8 * cpu));
|
|
bus_space_write_4(bst, scu_bsh, SCU_CPU_PWR_STS, pwr_sts);
|
|
|
|
pwr_cntl0 = bus_space_read_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL0_REG);
|
|
pwr_cntl0 &= ~((3 << 18) << ((cpu - 1) * 2));
|
|
bus_space_write_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL0_REG, pwr_cntl0);
|
|
|
|
amlogic_mpinit_delay(5000);
|
|
|
|
cpuclk = bus_space_read_4(bst, cbus_bsh, AMLOGIC_CBUS_CPU_CLK_CNTL_REG);
|
|
cpuclk |= (1 << (24 + cpu));
|
|
bus_space_write_4(bst, cbus_bsh, AMLOGIC_CBUS_CPU_CLK_CNTL_REG, cpuclk);
|
|
|
|
mempd0 = bus_space_read_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_MEM_PD0_REG);
|
|
mempd0 &= ~((uint32_t)(0xf << 28) >> ((cpu - 1) * 4));
|
|
bus_space_write_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_MEM_PD0_REG, mempd0);
|
|
|
|
pwr_cntl1 = bus_space_read_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL1_REG);
|
|
pwr_cntl1 &= ~((3 << 4) << ((cpu - 1) * 2));
|
|
bus_space_write_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL1_REG, pwr_cntl1);
|
|
|
|
amlogic_mpinit_delay(10000);
|
|
|
|
for (;;) {
|
|
pwr_cntl1 = bus_space_read_4(bst, ao_bsh,
|
|
AMLOGIC_AOBUS_PWR_CTRL1_REG) & ((1 << 17) << (cpu - 1));
|
|
if (pwr_cntl1)
|
|
break;
|
|
amlogic_mpinit_delay(10000);
|
|
}
|
|
|
|
pwr_cntl0 = bus_space_read_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL0_REG);
|
|
pwr_cntl0 &= ~(1 << cpu);
|
|
bus_space_write_4(bst, ao_bsh, AMLOGIC_AOBUS_PWR_CTRL0_REG, pwr_cntl0);
|
|
|
|
cpuclk = bus_space_read_4(bst, cbus_bsh, AMLOGIC_CBUS_CPU_CLK_CNTL_REG);
|
|
cpuclk &= ~(1 << (24 + cpu));
|
|
bus_space_write_4(bst, cbus_bsh, AMLOGIC_CBUS_CPU_CLK_CNTL_REG, cpuclk);
|
|
|
|
bus_space_write_4(bst, scu_bsh, SCU_CPU_PWR_STS, pwr_sts);
|
|
}
|
|
|
|
void
|
|
amlogic_mpinit(uint32_t mpinit_vec)
|
|
{
|
|
const bus_addr_t cbar = armreg_cbar_read();
|
|
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
|
volatile int i;
|
|
uint32_t ctrl, hatched = 0;
|
|
int cpu;
|
|
|
|
if (cbar == 0)
|
|
return;
|
|
|
|
const bus_space_handle_t scu_bsh =
|
|
cbar - AMLOGIC_CORE_BASE + AMLOGIC_CORE_VBASE;
|
|
const bus_space_handle_t cpuconf_bsh =
|
|
AMLOGIC_CORE_VBASE + AMLOGIC_CPUCONF_OFFSET;
|
|
|
|
const uint32_t scu_cfg = bus_space_read_4(bst, scu_bsh, SCU_CFG);
|
|
const u_int ncpus = (scu_cfg & SCU_CFG_CPUMAX) + 1;
|
|
if (ncpus < 2)
|
|
return;
|
|
|
|
for (cpu = 1; cpu < ncpus; cpu++) {
|
|
bus_space_write_4(bst, cpuconf_bsh,
|
|
AMLOGIC_CPUCONF_CPU_ADDR_REG(cpu), mpinit_vec);
|
|
amlogic_mpinit_cpu(cpu);
|
|
hatched |= __BIT(cpu);
|
|
}
|
|
ctrl = bus_space_read_4(bst, cpuconf_bsh, AMLOGIC_CPUCONF_CTRL_REG);
|
|
for (cpu = 0; cpu < ncpus; cpu++) {
|
|
ctrl |= __BIT(cpu);
|
|
}
|
|
bus_space_write_4(bst, cpuconf_bsh, AMLOGIC_CPUCONF_CTRL_REG, ctrl);
|
|
|
|
__asm __volatile("sev");
|
|
|
|
for (i = 0x10000000; i > 0; i--) {
|
|
__asm __volatile("dmb" ::: "memory");
|
|
if (arm_cpu_hatched == hatched)
|
|
break;
|
|
}
|
|
}
|
|
#endif
|