281 lines
8.1 KiB
Groff
281 lines
8.1 KiB
Groff
.\" $NetBSD: pci_configure_bus.9,v 1.14 2006/02/24 21:57:22 wiz Exp $
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.\"
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.\" Copyright 2001 Wasabi Systems, Inc.
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.\" All rights reserved.
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.\"
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.\" Written by Allen Briggs for Wasabi Systems, Inc.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed for the NetBSD Project by
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.\" Wasabi Systems, Inc.
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.\" 4. The name of Wasabi Systems, Inc. may not be used to endorse
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.\" or promote products derived from this software without specific prior
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.\" written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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.\" POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd February 21, 2006
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.Dt PCI_CONFIGURE_BUS 9
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.Os
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.Sh NAME
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.Nm pci_configure_bus ,
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.Nm pci_conf_hook ,
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.Nm pci_conf_interrupt
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.Nd perform PCI bus configuration
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.Sh SYNOPSIS
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.In dev/pci/pciconf.h
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.Ft int
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.Fo pci_configure_bus
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.Fa "pci_chipset_tag_t pc"
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.Fa "struct extent *ioext"
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.Fa "struct extent *memext"
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.Fa "struct extent *pmemext"
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.Fa "int firstbus"
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.Fa "int cacheline_size"
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.Fc
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.Sh DESCRIPTION
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The
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.Fn pci_configure_bus
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function configures a PCI bus for use.
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This involves:
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.Bl -bullet
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.It
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Defining bus numbers for all busses on the system,
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.It
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Setting the Base Address Registers for all devices,
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.It
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Setting up the interrupt line register for all devices,
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.It
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Configuring bus latency timers for all devices, and
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.It
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Configuring cacheline sizes for all devices.
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.El
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.Pp
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In traditional PCs and Alpha systems, the BIOS or firmware takes care
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of this task, but that is not the case for all systems.
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.Fn pci_configure_bus
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should be called prior to the autoconfiguration of the bus.
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.Pp
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The
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.Fa pc
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argument is a machine-dependent tag used to specify the PCI chipset to the
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system.
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This should be the same value used with
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.Fn pci_make_tag .
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The extent arguments
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define memory extents from which the address space for the cards will be
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taken.
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These addresses should be in the PCI address space.
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The
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.Fa ioext
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extent is for PCI I/O accesses.
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The
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.Fa memext
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extent is for PCI memory accesses that might have side effects.
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I.e., that can not be cached.
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The
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.Fa pmemext
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extent is for PCI memory accesses that can be cached.
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The
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.Fa pmemext
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extent will be used for any ROMs and any memory regions that are marked as
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.Dq prefetchable
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in their BAR.
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If an implementation does not distinguish between
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prefetchable and non-prefetchable memory, it may pass NULL for
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.Fa pmemext .
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In this case, prefetchable memory allocations will be made from the
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non-prefetchable region.
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The
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.Fa firstbus
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argument indicates the number of the first bus to be configured.
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The
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.Fa cacheline_size
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argument is used to configure the PCI Cache Line Size Register; it
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should be the size, in bytes, of the largest D-cache line on the system.
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.Pp
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An implementation may choose to not have full configuration performed
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by
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.Fn pci_configure_bus
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on certain PCI devices, such as PCI host bridges or PCI bus analyzers
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which are instantiated as devices on the bus.
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In order for this to take place, the header
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.Aq Pa machine/pci_machdep.h
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must define the
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.Dv __HAVE_PCI_CONF_HOOK
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symbol (without a value), and a machine-dependent function
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.Fn pci_conf_hook
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(declared in the same header)
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must be defined.
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The prototype for this function is
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.Pp
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.Fn "int pci_conf_hook" "pci_chipset_tag_t pc" "int bus" \
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"int device" "int function" "pcireg_t id"
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.Pp
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In this function,
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.Fa bus ,
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.Fa device ,
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and
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.Fa function
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uniquely identify the item being configured;
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in addition to this, the value of the device's PCI identification
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register is passed in
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.Fa id .
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For each device
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.Fn pci_conf_hook
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can then decide upon the amount of configuration to be performed by
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returning a bitwise inclusive-or of the following flags:
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.Bl -tag -width PCI_CONF_ENABLE_MEM -offset indent
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.It Dv PCI_CONF_MAP_IO
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Configure Base Address Registers that map I/O space
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.It Dv PCI_CONF_MAP_MEM
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Configure Base Address Registers that map memory space
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.It Dv PCI_CONF_MAP_ROM
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Configure Expansion ROM Base Address register
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.It Dv PCI_CONF_ENABLE_IO
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Enable I/O space accesses
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.It Dv PCI_CONF_ENABLE_MEM
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Enable memory space accesses
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.It Dv PCI_CONF_ENABLE_BM
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Enable bus mastering
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.El
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.Pp
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In addition,
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.Dv PCI_CONF_ALL
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specifies all of the above.
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.Pp
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One of the functions of
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.Fn pci_configure_bus
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is to configure interrupt
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.Dq line
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information.
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This must be done on a machine-dependent basis, so a
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machine-dependent function
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.Fn pci_conf_interrupt
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must be defined.
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The prototype for this function is
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.Pp
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.Fn "void pci_conf_interrupt" "pci_chipset_tag_t pc" "int bus" \
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"int device" "int pin" "int swiz" "int *iline"
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.Pp
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In this function,
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.Fa bus ,
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.Fa device ,
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and
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.Fa pin ,
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uniquely identify the item being configured.
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The
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.Fa swiz
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argument is a
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.Dq swizzle ,
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a sum of the device numbers of the primary interface of the bridges between
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the host bridge and the current device.
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The function is responsible for setting the value of
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.Fa iline .
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See chapter 9 of the
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.Dq PCI-to-PCI Bridge Architecture Specification
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for more information on swizzling (also known as interrupt routing).
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.Sh RETURN VALUES
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If successful
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.Fn pci_configure_bus
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returns 0.
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A non-zero return value means that the bus was not completely
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configured for some reason.
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A description of the failure will be displayed on the console.
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.Sh ENVIRONMENT
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The
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.Fn pci_configure_bus
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function is only included in the kernel if the kernel is compiled with
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the
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.Dv PCI_NETBSD_CONFIGURE
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option enabled.
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.Sh EXAMPLES
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The
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.Fn pci_conf_hook
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function in evbppc's walnut implementation looks like:
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.Pp
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.Bd -literal -compact
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int
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pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
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pcireg_t id)
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{
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if ((PCI_VENDOR(id) == PCI_VENDOR_IBM \*[Am]\*[Am]
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PCI_PRODUCT(id) == PCI_PRODUCT_IBM_405GP) ||
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(PCI_VENDOR(id) == PCI_VENDOR_INTEL \*[Am]\*[Am]
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PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_80960_RP)) {
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/* Don't configure the bridge and PCI probe. */
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return 0;
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}
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return (PCI_CONF_ALL \*[Am] ~PCI_CONF_MAP_ROM);
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}
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.Ed
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.Pp
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The
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.Fn pci_conf_interrupt
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function in the sandpoint implementation looks like:
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.Pp
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.Bd -literal -compact
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void
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pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
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int swiz, int *iline)
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{
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if (bus == 0) {
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*iline = dev;
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} else {
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*iline = 13 + ((swiz + dev + 3) \*[Am] 3);
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}
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}
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.Ed
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.Pp
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The BeBox has nearly 1GB of PCI I/O memory starting at processor address
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0x81000000 (PCI I/O address 0x01000000), and nearly 1GB of PCI memory
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starting at 0xC0000000 (PCI memory address 0x00000000).
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The
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.Fn pci_configure_bus
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function might be called as follows:
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.Pp
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.Bd -literal -compact
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struct extent *ioext, *memext;
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...
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ioext = extent_create("pciio", 0x01000000, 0x0fffffff, M_DEVBUF,
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NULL, 0, EX_NOWAIT);
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memext = extent_create("pcimem", 0x00000000, 0x0fffffff, M_DEVBUF,
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NULL, 0, EX_NOWAIT);
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...
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pci_configure_bus(0, ioext, memext, NULL);
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...
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extent_destroy(ioext);
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extent_destroy(memext);
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...
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.Ed
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.Pp
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Note that this must be called before the PCI bus is attached during
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autoconfiguration.
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.Sh SEE ALSO
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.Xr pci 4 ,
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.Xr extent 9
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.Sh HISTORY
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.Fn pci_configure_bus
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was added in
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.Nx 1.6 .
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