230 lines
7.6 KiB
C
230 lines
7.6 KiB
C
/* $NetBSD: ncr5380var.h,v 1.13 1998/11/19 21:53:00 thorpej Exp $ */
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/*
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* Copyright (c) 1995 David Jones, Gordon W. Ross
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* Copyright (c) 1994 Jarle Greipsland
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the authors may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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* 4. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by
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* David Jones and Gordon Ross
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file defines the interface between the machine-dependent
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* module and the machine-indepenedent ncr5380sbc.c module.
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*/
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/*
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* Only the i386 uses real bus space:
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* arm32: oak and csa drivers; easy to convert
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* mac68k: sbc driver; easy to convert
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* pc532: ncr driver; need bus.h first
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* sparc: si and sw drivers; easy to convert
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* sun3: si driver; need bus.h first
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* vax: ncr driver; need bus.h first
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*/
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#ifdef __i386__
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# define NCR5380_USE_BUS_SPACE
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#endif
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/*
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* Handy read/write macros
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*/
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#ifdef NCR5380_USE_BUS_SPACE
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# include <machine/bus.h>
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/* bus_space() variety */
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# define NCR5380_READ(sc, reg) bus_space_read_1(sc->sc_regt, \
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sc->sc_regh, sc->reg)
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# define NCR5380_WRITE(sc, reg, val) bus_space_write_1(sc->sc_regt, \
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sc->sc_regh, sc->reg, val)
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#else
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/* legacy memory-mapped variety */
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# define NCR5380_READ(sc, reg) (*sc->reg)
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# define NCR5380_WRITE(sc, reg, val) do { *(sc->reg) = val; } while (0)
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#endif
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#define SCI_CLR_INTR(sc) NCR5380_READ(sc, sci_iack)
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#define SCI_BUSY(sc) (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
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/* These are NOT artibtrary, but map to bits in sci_tcmd */
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#define PHASE_DATA_OUT 0x0
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#define PHASE_DATA_IN 0x1
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#define PHASE_COMMAND 0x2
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#define PHASE_STATUS 0x3
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#define PHASE_UNSPEC1 0x4
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#define PHASE_UNSPEC2 0x5
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#define PHASE_MSG_OUT 0x6
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#define PHASE_MSG_IN 0x7
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/*
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* This illegal phase is used to prevent the 5380 from having
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* a phase-match condition when we don't want one, such as
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* when setting up the DMA engine or whatever...
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*/
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#define PHASE_INVALID PHASE_UNSPEC1
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/* Per-request state. This is required in order to support reselection. */
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struct sci_req {
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struct scsipi_xfer *sr_xs; /* Pointer to xfer struct, NULL=unused */
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int sr_target, sr_lun; /* For fast access */
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void *sr_dma_hand; /* Current DMA hnadle */
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u_char *sr_dataptr; /* Saved data pointer */
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int sr_datalen;
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int sr_flags; /* Internal error code */
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#define SR_IMMED 1 /* Immediate command */
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#define SR_SENSE 2 /* We are getting sense */
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#define SR_OVERDUE 4 /* Timeout while not current */
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#define SR_ERROR 8 /* Error occurred */
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int sr_status; /* Status code from last cmd */
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};
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#define SCI_OPENINGS 16 /* How many commands we can enqueue. */
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struct ncr5380_softc {
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struct device sc_dev;
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struct scsipi_link sc_link;
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struct scsipi_adapter sc_adapter;
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#ifdef NCR5380_USE_BUS_SPACE
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/* Pointers to bus_space */
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bus_space_tag_t sc_regt;
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bus_space_handle_t sc_regh;
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/* Pointers to 5380 registers. */
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bus_size_t sci_r0;
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bus_size_t sci_r1;
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bus_size_t sci_r2;
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bus_size_t sci_r3;
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bus_size_t sci_r4;
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bus_size_t sci_r5;
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bus_size_t sci_r6;
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bus_size_t sci_r7;
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#else
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/* Pointers to 5380 registers. See ncr5380reg.h */
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volatile u_char *sci_r0;
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volatile u_char *sci_r1;
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volatile u_char *sci_r2;
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volatile u_char *sci_r3;
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volatile u_char *sci_r4;
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volatile u_char *sci_r5;
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volatile u_char *sci_r6;
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volatile u_char *sci_r7;
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#endif
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/* Functions set from MD code */
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int (*sc_pio_out) __P((struct ncr5380_softc *,
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int, int, u_char *));
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int (*sc_pio_in) __P((struct ncr5380_softc *,
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int, int, u_char *));
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void (*sc_dma_alloc) __P((struct ncr5380_softc *));
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void (*sc_dma_free) __P((struct ncr5380_softc *));
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void (*sc_dma_setup) __P((struct ncr5380_softc *));
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void (*sc_dma_start) __P((struct ncr5380_softc *));
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void (*sc_dma_poll) __P((struct ncr5380_softc *));
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void (*sc_dma_eop) __P((struct ncr5380_softc *));
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void (*sc_dma_stop) __P((struct ncr5380_softc *));
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void (*sc_intr_on) __P((struct ncr5380_softc *));
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void (*sc_intr_off) __P((struct ncr5380_softc *));
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int sc_flags; /* Misc. flags and capabilities */
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#define NCR5380_FORCE_POLLING 1 /* Do not use interrupts. */
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/* Set bits in this to disable disconnect per-target. */
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int sc_no_disconnect;
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/* Set bits in this to disable parity for some target. */
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int sc_parity_disable;
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int sc_min_dma_len; /* Smaller than this is done with PIO */
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/* Begin MI shared data */
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int sc_state;
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#define NCR_IDLE 0 /* Ready for new work. */
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#define NCR_WORKING 0x01 /* Some command is in progress. */
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#define NCR_ABORTING 0x02 /* Bailing out */
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#define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */
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#define NCR_DROP_MSGIN 0x10 /* Discard all msgs (parity err detected) */
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/* The request that has the bus now. */
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struct sci_req *sc_current;
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/* Active data pointer for current SCSI command. */
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u_char *sc_dataptr;
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int sc_datalen;
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/* Begin MI private data */
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/* The number of operations in progress on the bus */
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volatile int sc_ncmds;
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/* Ring buffer of pending/active requests */
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struct sci_req sc_ring[SCI_OPENINGS];
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int sc_rr; /* Round-robin scan pointer */
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/* Active requests, by target/LUN */
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struct sci_req *sc_matrix[8][8];
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/* Message stuff */
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int sc_prevphase;
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u_int sc_msgpriq; /* Messages we want to send */
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u_int sc_msgoutq; /* Messages sent during last MESSAGE OUT */
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u_int sc_msgout; /* Message last transmitted */
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#define SEND_DEV_RESET 0x01
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#define SEND_PARITY_ERROR 0x02
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#define SEND_ABORT 0x04
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#define SEND_REJECT 0x08
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#define SEND_INIT_DET_ERR 0x10
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#define SEND_IDENTIFY 0x20
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#define SEND_SDTR 0x40
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#define SEND_WDTR 0x80
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#define NCR_MAX_MSG_LEN 8
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u_char sc_omess[NCR_MAX_MSG_LEN];
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u_char *sc_omp; /* Outgoing message pointer */
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u_char sc_imess[NCR_MAX_MSG_LEN];
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u_char *sc_imp; /* Incoming message pointer */
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};
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void ncr5380_init __P((struct ncr5380_softc *));
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void ncr5380_reset_scsibus __P((struct ncr5380_softc *));
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int ncr5380_intr __P((struct ncr5380_softc *));
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int ncr5380_scsi_cmd __P((struct scsipi_xfer *));
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int ncr5380_pio_in __P((struct ncr5380_softc *, int, int, u_char *));
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int ncr5380_pio_out __P((struct ncr5380_softc *, int, int, u_char *));
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#ifdef NCR5380_DEBUG
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struct ncr5380_softc *ncr5380_debug_sc;
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void ncr5380_trace __P((char *msg, long val));
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#define NCR_TRACE(msg, val) ncr5380_trace(msg, val)
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#else /* NCR5380_DEBUG */
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#define NCR_TRACE(msg, val) /* nada */
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#endif /* NCR5380_DEBUG */
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