212 lines
7.2 KiB
C
212 lines
7.2 KiB
C
/* $NetBSD: pmap.h,v 1.5 2002/09/22 07:53:47 chs Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IBM4XX_PMAP_H_
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#define _IBM4XX_PMAP_H_
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#include <powerpc/ibm4xx/pte.h>
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#include <powerpc/ibm4xx/tlb.h>
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#define KERNEL_PID 1 /* TLB PID to use for kernel translation */
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/*
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* A TTE is a 16KB or greater TLB entry w/size and endiannes bits
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* stuffed in the (unused) low bits of the PA.
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*/
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#define TTE_PA_MASK 0xffffc000
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#define TTE_RPN_MASK(sz) (~((1 << (10 + 2 * (sz))) - 1))
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#define TTE_ENDIAN 0x00002000
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#define TTE_SZ_MASK 0x00001c00
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#define TTE_SZ_SHIFT 10
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/* TTE_SZ_1K and TTE_SZ_4K are not allowed. */
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#define TTE_SZ_16K (TLB_SIZE_16K << TTE_SZ_SHIFT)
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#define TTE_SZ_64K (TLB_SIZE_64K << TTE_SZ_SHIFT)
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#define TTE_SZ_256K (TLB_SIZE_256K << TTE_SZ_SHIFT)
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#define TTE_SZ_1M (TLB_SIZE_1M << TTE_SZ_SHIFT)
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#define TTE_SZ_4M (TLB_SIZE_4M << TTE_SZ_SHIFT)
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#define TTE_SZ_16M (TLB_SIZE_16M << TTE_SZ_SHIFT)
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#define TTE_EX TLB_EX
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#define TTE_WR TLB_WR
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#define TTE_ZSEL_MASK TLB_ZSEL_MASK
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#define TTE_ZSEL_SHFT TLB_ZSEL_SHFT
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#define TTE_W TLB_W
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#define TTE_I TLB_I
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#define TTE_M TLB_M
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#define TTE_G TLB_G
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#define ZONE_PRIV 0
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#define ZONE_USER 1
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#define TTE_PA(p) ((p)&TTE_PA_MASK)
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#define TTE_ZONE(z) TLB_ZONE(z)
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#define MKTTE(pa,sz,zn,e,fl) (((pa)&TTE_PA_MASK)|((sz)&TTE_SZ_MASK)|\
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(TTE_ZONE(zn))|(fl)|((e)?TTE_ENDIAN:0)
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/*
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* Definitions for sizes of 1st and 2nd level page tables.
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*
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*/
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#define PTSZ (NBPG / 4)
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#define PTMAP (PTSZ * NBPG)
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#define PTMSK ((PTMAP - 1) & ~(PGOFSET))
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#define PTIDX(v) (((v) & PTMSK) >> PGSHIFT)
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/* 2nd level tables map in any bits not mapped by 1st level tables. */
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#define STSZ ((0xffffffffU / (NBPG * PTSZ)) + 1)
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#define STMAP (0xffffffffU)
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#define STMSK (~(PTMAP - 1))
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#define STIDX(v) ((v) >> (PGSHIFT + 12))
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/*
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* Extra flags to pass to pmap_enter() -- make sure they don't conflict
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* w/PMAP_CANFAIL or PMAP_WIRED
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*/
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#define PME_NOCACHE 0x100
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#define PME_WRITETHROUG 0x200
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#ifndef _LOCORE
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/*
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* Pmap stuff
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*/
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struct pmap {
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volatile tlbpid_t pm_ctx; /* PID to identify PMAP's entries in TLB */
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int pm_refs; /* ref count */
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struct pmap_statistics pm_stats; /* pmap statistics */
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volatile u_int *pm_ptbl[STSZ]; /* Array of 64 pointers to page tables. */
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};
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typedef struct pmap *pmap_t;
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#ifdef _KERNEL
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#define PMAP_GROWKERNEL
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extern struct pmap kernel_pmap_;
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#define pmap_kernel() (&kernel_pmap_)
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#define pmap_clear_modify(pg) (check_attr((pg), PTE_HI_CHG, 1))
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#define pmap_clear_reference(pg) (check_attr((pg), PTE_HI_REF, 1))
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#define pmap_is_modified(pg) (check_attr((pg), PTE_HI_CHG, 0))
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#define pmap_is_referenced(pg) (check_attr((pg), PTE_HI_REF, 0))
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#define pmap_phys_address(x) (x)
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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void pmap_unwire(struct pmap *pm, vaddr_t va);
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void pmap_bootstrap(u_int kernelstart, u_int kernelend);
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boolean_t pmap_extract(struct pmap *, vaddr_t, paddr_t *);
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boolean_t check_attr(struct vm_page *, u_int, int);
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int ptereadonly(struct vm_page *);
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void pmap_real_memory(paddr_t *, psize_t *);
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int pmap_tlbmiss(vaddr_t va, int ctx);
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static __inline void
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pmap_remove_all(struct pmap *pmap)
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{
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/* Nothing. */
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}
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int ctx_alloc(struct pmap*);
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void ctx_free(struct pmap*);
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#define PMAP_NEED_PROCWR
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void pmap_procwr(struct proc *, vaddr_t, size_t);
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/*
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* Alternate mapping hooks for pool pages. Avoids thrashing the TLB.
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*
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* Note: This won't work if we have more memory than can be direct-mapped
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* VA==PA all at once. But pmap_copy_page() and pmap_zero_page() will have
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* this problem, too.
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*/
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#define PMAP_MAP_POOLPAGE(pa) (pa)
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#define PMAP_UNMAP_POOLPAGE(pa) (pa)
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static __inline paddr_t vtophys(vaddr_t);
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static __inline paddr_t
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vtophys(vaddr_t va)
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{
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paddr_t pa;
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/* XXX should check battable */
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if (pmap_extract(pmap_kernel(), va, &pa))
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return pa;
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return va;
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}
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#endif /* _KERNEL */
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#endif /* _LOCORE */
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#endif /* _IBM4XX_PMAP_H_ */
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