403 lines
11 KiB
C
403 lines
11 KiB
C
/* $NetBSD: ahc_pci.c,v 1.21 2000/01/26 06:44:18 thorpej Exp $ */
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/*
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* Product specific probe and attach routines for:
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* 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers
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*
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* Copyright (c) 1995, 1996 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ic/aic7xxxreg.h>
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#include <dev/ic/aic7xxxvar.h>
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/*
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* Under normal circumstances, these messages are unnecessary
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* and not terribly cosmetic.
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*/
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#ifdef DEBUG
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#define bootverbose 1
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#else
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#define bootverbose 0
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#endif
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#define PCI_BASEADR_IO 0x10
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#define PCI_BASEADR_MEM 0x14
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#define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940UP 0x87789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul
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#define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul
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#define DEVCONFIG 0x40
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#define MPORTMODE 0x00000400ul /* aic7870 only */
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#define RAMPSM 0x00000200ul /* aic7870 only */
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#define VOLSENSE 0x00000100ul
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#define SCBRAMSEL 0x00000080ul
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#define MRDCEN 0x00000040ul
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#define EXTSCBTIME 0x00000020ul /* aic7870 only */
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#define EXTSCBPEN 0x00000010ul /* aic7870 only */
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#define BERREN 0x00000008ul
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#define DACEN 0x00000004ul
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#define STPWLEVEL 0x00000002ul
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#define DIFACTNEGEN 0x00000001ul /* aic7870 only */
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#define CSIZE_LATTIME 0x0c
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#define CACHESIZE 0x0000003ful /* only 5 bits */
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#define LATTIME 0x0000ff00ul
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static u_char aic3940_count;
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int ahc_pci_probe __P((struct device *, struct cfdata *, void *));
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void ahc_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach ahc_pci_ca = {
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sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach
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};
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int
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ahc_pci_probe(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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switch (pa->pa_id) {
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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case PCI_DEVICE_ID_ADAPTEC_2940UP:
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case PCI_DEVICE_ID_ADAPTEC_2940AU:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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case PCI_DEVICE_ID_ADAPTEC_2944:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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case PCI_DEVICE_ID_ADAPTEC_AIC7880:
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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return 1;
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}
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return 0;
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}
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void
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ahc_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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struct ahc_data *ahc = (void *)self;
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bus_space_tag_t st, iot, memt;
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bus_space_handle_t sh, ioh, memh;
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int ioh_valid, memh_valid;
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pci_intr_handle_t ih;
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const char *intrstr;
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u_long id;
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unsigned opri = 0;
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ahc_type ahc_t = AHC_NONE;
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ahc_flag ahc_f = AHC_FNONE;
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u_char ultra_enb = 0;
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u_char our_id = 0;
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ioh_valid = (pci_mapreg_map(pa, PCI_BASEADR_IO,
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PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL) == 0);
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memh_valid = (pci_mapreg_map(pa, PCI_BASEADR_MEM,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&memt, &memh, NULL, NULL) == 0);
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if (memh_valid) {
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st = memt;
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sh = memh;
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} else if (ioh_valid) {
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st = iot;
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sh = ioh;
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} else {
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printf(": unable to map registers\n");
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return;
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}
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printf("\n");
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switch (id = pa->pa_id) {
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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if (id == PCI_DEVICE_ID_ADAPTEC_3940U)
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ahc_t = AHC_394U;
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else
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ahc_t = AHC_394;
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aic3940_count++;
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if(!(aic3940_count & 0x01))
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/* Even count implies second channel */
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ahc_f |= AHC_CHNLB;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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case PCI_DEVICE_ID_ADAPTEC_2940UP:
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ahc_t = AHC_294U;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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ahc_t = AHC_294;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940AU:
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ahc_t = AHC_294AU;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7880:
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ahc_t = AHC_AIC7880;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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ahc_t = AHC_AIC7870;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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ahc_t = AHC_AIC7860;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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ahc_t = AHC_AIC7850;
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break;
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default:
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break;
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}
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/* On all PCI adapters, we allow SCB paging */
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ahc_f |= AHC_PAGESCBS;
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/* Remeber how the card was setup in case there is no SEEPROM */
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our_id = bus_space_read_1(st, sh, SCSIID) & OID;
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if(ahc_t & AHC_ULTRA)
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ultra_enb = bus_space_read_1(st, sh, SXFRCTL0) & ULTRAEN;
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ahc_reset(ahc->sc_dev.dv_xname, st, sh);
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if(ahc_t & AHC_AIC7870){
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u_long devconfig =
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pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
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if(devconfig & (RAMPSM)) {
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/*
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* External SRAM present. Have the probe walk
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* the SCBs to see how much SRAM we have and set
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* the number of SCBs accordingly. We have to
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* turn off SCBRAMSEL to access the external
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* SCB SRAM.
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*
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* It seems that early versions of the aic7870
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* didn't use these bits, hence the hack for the
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* 3940 above. I would guess that recent 3940s
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* using later aic7870 or aic7880 chips do
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* actually set RAMPSM.
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*
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* The documentation isn't clear, but it sounds
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* like the value written to devconfig must not
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* have RAMPSM set. The second sixteen bits of
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* the register are R/O anyway, so it shouldn't
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* affect RAMPSM either way.
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*/
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devconfig &= ~(RAMPSM|SCBRAMSEL);
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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DEVCONFIG, devconfig);
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}
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}
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ahc_construct(ahc, st, sh, pa->pa_dmat, ahc_t, ahc_f);
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if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname);
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ahc_free(ahc);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc);
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if (ahc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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ahc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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ahc_free(ahc);
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return;
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}
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if (intrstr != NULL)
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printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname,
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intrstr);
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/*
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* Protect ourself from spurrious interrupts during
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* intialization.
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*/
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opri = splbio();
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/*
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* Do aic7870/aic7880/aic7850 specific initialization
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*/
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{
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u_char sblkctl;
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char *id_string;
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switch(ahc->type) {
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case AHC_394U:
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case AHC_294U:
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case AHC_AIC7880:
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{
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id_string = "aic7880 ";
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ahc_load_seeprom(ahc);
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break;
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}
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case AHC_394:
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case AHC_294:
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case AHC_AIC7870:
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{
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id_string = "aic7870 ";
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ahc_load_seeprom(ahc);
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break;
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}
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case AHC_294AU:
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case AHC_AIC7860:
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{
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id_string = "aic7860 ";
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ahc_load_seeprom(ahc);
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break;
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}
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case AHC_AIC7850:
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{
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id_string = "aic7850 ";
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/*
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* Use defaults, if the chip wasn't initialized by
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* a BIOS.
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*/
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ahc->flags |= AHC_USEDEFAULTS;
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break;
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}
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default:
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{
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printf("ahc: Unknown controller type. Ignoring.\n");
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ahc_free(ahc);
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splx(opri);
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return;
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}
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}
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/*
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* Take the LED out of diagnostic mode
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*/
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sblkctl = AHC_INB(ahc, SBLKCTL);
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AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
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/*
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* I don't know where this is set in the SEEPROM or by the
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* BIOS, so we default to 100%.
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*/
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AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100);
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if(ahc->flags & AHC_USEDEFAULTS) {
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/*
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* PCI Adapter default setup
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* Should only be used if the adapter does not have
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* an SEEPROM.
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*/
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/* See if someone else set us up already */
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u_long i;
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for(i = TARG_SCRATCH; i < 0x60; i++) {
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if(AHC_INB(ahc, i) != 0x00)
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break;
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}
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if(i == TARG_SCRATCH) {
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/*
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* Try looking for all ones. You can get
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* either.
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*/
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for (i = TARG_SCRATCH; i < 0x60; i++) {
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if(AHC_INB(ahc, i) != 0xff)
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break;
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}
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}
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if((i != 0x60) && (our_id != 0)) {
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printf("%s: Using left over BIOS settings\n",
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ahc_name(ahc));
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ahc->flags &= ~AHC_USEDEFAULTS;
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}
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else
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our_id = 0x07;
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AHC_OUTB(ahc, SCSICONF,
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(our_id & 0x07)|ENSPCHK|RESET_SCSI);
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/* In case we are a wide card */
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AHC_OUTB(ahc, SCSICONF + 1, our_id);
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if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) {
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/*
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* If there wasn't a BIOS or the board
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* wasn't in this mode to begin with,
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* turn off ultra.
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*/
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ahc->type &= ~AHC_ULTRA;
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}
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}
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printf("%s: %s", ahc_name(ahc), id_string);
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}
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if(ahc_init(ahc)){
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ahc_free(ahc);
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splx(opri);
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return; /* XXX PCI code should take return status */
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}
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splx(opri);
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ahc_attach(ahc);
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}
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