114 lines
4.1 KiB
C
114 lines
4.1 KiB
C
/* $NetBSD: tlb.h,v 1.1 2001/06/13 06:01:50 simonb Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IBM4XX_TLB_H_
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#define _IBM4XX_TLB_H_
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#define NTLB 64
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/* TLBHI entries */
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#define TLB_EPN_MASK 0xfffff000 /* It's 0xfffffc00, but as we use 4K pages we don't need two lower bits */
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#define TLB_EPN_SHFT 12
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#define TLB_SIZE_MASK 0x00000380
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#define TLB_SIZE_SHFT 7
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#define TLB_VALID 0x00000040
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#define TLB_ENDIAN 0x00000020
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#define TLB_U0 0x00000010
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#define TLB_SIZE_1K 0
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#define TLB_SIZE_4K 1
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#define TLB_SIZE_16K 2
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#define TLB_SIZE_64K 3
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#define TLB_SIZE_256K 4
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#define TLB_SIZE_1M 5
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#define TLB_SIZE_4M 6
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#define TLB_SIZE_16M 7
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#define TLB_PG_1K (TLB_SIZE_1K<<TLB_SIZE_SHFT)
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#define TLB_PG_4K (TLB_SIZE_4K<<TLB_SIZE_SHFT)
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#define TLB_PG_16K (TLB_SIZE_16K<<TLB_SIZE_SHFT)
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#define TLB_PG_64K (TLB_SIZE_64K<<TLB_SIZE_SHFT)
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#define TLB_PG_256K (TLB_SIZE_256K<<TLB_SIZE_SHFT)
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#define TLB_PG_1M (TLB_SIZE_1M<<TLB_SIZE_SHFT)
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#define TLB_PG_4M (TLB_SIZE_4M<<TLB_SIZE_SHFT)
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#define TLB_PG_16M (TLB_SIZE_16M<<TLB_SIZE_SHFT)
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/* TLBLO entries */
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#define TLB_RPN_MASK 0xfffffc00 /* Real Page Number mask */
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#define TLB_EX 0x00000200 /* EXecute enable */
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#define TLB_WR 0x00000100 /* WRite enable */
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#define TLB_ZSEL_MASK 0x000000f0 /* Zone SELect mask */
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#define TLB_ZSEL_SHFT 4
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#define TLB_W 0x00000008 /* Write-through */
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#define TLB_I 0x00000004 /* Inhibit caching */
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#define TLB_M 0x00000002 /* Memory coherent */
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#define TLB_G 0x00000001 /* Guarded */
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#define TLB_ZONE(z) (((z) << TLB_ZSEL_SHFT) & TLB_ZSEL_MASK)
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/* We only need two zones for kernel and user-level processes */
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#define TLB_SU_ZONE 0 /* Kernel-only access controlled permission bits in TLB */
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#define TLB_U_ZONE 1 /* Access always controlled by permission bits in TLB entry */
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#define TLB_HI(epn,size,flags) (((epn)&TLB_EPN_MASK)|(((size)<<TLB_SIZE_SHFT)&TLB_SIZE_MASK)|(flags))
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#define TLB_LO(rpn,zone,flags) (((rpn)&TLB_RPN_MASK)|(((zone)<<TLB_ZSEL_SHFT)&TLB_ZSEL_MASK)|(flags))
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#ifndef _LOCORE
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typedef u_short tlbpid_t;
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typedef struct tlb_s {
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u_int tlb_hi;
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u_int tlb_lo;
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} tlb_t;
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struct pmap;
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void ppc4xx_tlb_enter(int, vaddr_t, u_int);
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void ppc4xx_tlb_flush(vaddr_t, int);
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void ppc4xx_tlb_flush_all(void);
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void ppc4xx_tlb_init(void);
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int ppc4xx_tlb_new_pid(struct pmap *);
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void ppc4xx_tlb_unpin(int);
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#endif
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#define TLB_PID_INVALID 0xFFFF
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#define TLB_NRESERVED 4 /* Reserve 4 TLB entries for kernel */
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#endif /* _IBM4XX_TLB_H_ */
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