280 lines
7.7 KiB
C
280 lines
7.7 KiB
C
/* $NetBSD: as3722.c,v 1.4 2015/12/13 17:15:06 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.4 2015/12/13 17:15:06 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kmem.h>
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#include <sys/wdog.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/as3722.h>
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#define AS3722_GPIO0_CTRL_REG 0x08
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#define AS3722_GPIO0_CTRL_INVERT __BIT(7)
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#define AS3722_GPIO0_CTRL_IOSF __BITS(6,3)
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#define AS3722_GPIO0_CTRL_IOSF_GPIO 0
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#define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9
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#define AS3722_GPIO0_CTRL_MODE __BITS(2,0)
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#define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5
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#define AS3722_RESET_CTRL_REG 0x36
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#define AS3722_RESET_CTRL_POWER_OFF __BIT(1)
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#define AS3722_RESET_CTRL_FORCE_RESET __BIT(0)
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#define AS3722_WATCHDOG_CTRL_REG 0x38
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#define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1)
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#define AS3722_WATCHDOG_CTRL_ON __BIT(0)
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#define AS3722_WATCHDOG_TIMER_REG 0x46
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#define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0)
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#define AS3722_WATCHDOG_SIGNAL_REG 0x48
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#define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6)
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#define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0)
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#define AS3722_ASIC_ID1_REG 0x90
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#define AS3722_ASIC_ID2_REG 0x91
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struct as3722_softc {
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device_t sc_dev;
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i2c_tag_t sc_i2c;
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i2c_addr_t sc_addr;
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struct sysmon_wdog sc_smw;
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};
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#define AS3722_WATCHDOG_DEFAULT_PERIOD 10
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static int as3722_match(device_t, cfdata_t, void *);
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static void as3722_attach(device_t, device_t, void *);
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static int as3722_wdt_setmode(struct sysmon_wdog *);
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static int as3722_wdt_tickle(struct sysmon_wdog *);
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static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int);
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static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int);
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static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t,
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uint8_t, int);
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CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc),
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as3722_match, as3722_attach, NULL, NULL);
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static const char * as3722_compats[] = {
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"ams,as3722",
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NULL
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};
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static int
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as3722_match(device_t parent, cfdata_t match, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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uint8_t reg, id1;
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int error;
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if (ia->ia_name == NULL) {
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iic_acquire_bus(ia->ia_tag, I2C_F_POLL);
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reg = AS3722_ASIC_ID1_REG;
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error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
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®, 1, &id1, 1, I2C_F_POLL);
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iic_release_bus(ia->ia_tag, I2C_F_POLL);
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if (error == 0 && id1 == 0x0c)
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return 1;
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return 0;
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} else {
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return iic_compat_match(ia, as3722_compats);
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}
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}
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static void
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as3722_attach(device_t parent, device_t self, void *aux)
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{
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struct as3722_softc * const sc = device_private(self);
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struct i2c_attach_args *ia = aux;
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int error;
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sc->sc_dev = self;
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sc->sc_i2c = ia->ia_tag;
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sc->sc_addr = ia->ia_addr;
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aprint_naive("\n");
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aprint_normal(": AMS AS3822\n");
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iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
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error = as3722_write(sc, AS3722_GPIO0_CTRL_REG,
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__SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO,
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AS3722_GPIO0_CTRL_IOSF) |
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__SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN,
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AS3722_GPIO0_CTRL_MODE),
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I2C_F_POLL);
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error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
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__SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL);
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iic_release_bus(sc->sc_i2c, I2C_F_POLL);
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if (error)
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aprint_error_dev(self, "couldn't setup watchdog\n");
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sc->sc_smw.smw_name = device_xname(self);
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sc->sc_smw.smw_cookie = sc;
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sc->sc_smw.smw_setmode = as3722_wdt_setmode;
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sc->sc_smw.smw_tickle = as3722_wdt_tickle;
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sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
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aprint_normal_dev(self, "default watchdog period is %u seconds\n",
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sc->sc_smw.smw_period);
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if (sysmon_wdog_register(&sc->sc_smw) != 0)
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aprint_error_dev(self, "couldn't register with sysmon\n");
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}
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static int
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as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags)
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{
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return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr,
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®, 1, val, 1, flags);
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}
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static int
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as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags)
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{
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uint8_t buf[2] = { reg, val };
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return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
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NULL, 0, buf, 2, flags);
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}
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static int
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as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set,
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uint8_t clr, int flags)
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{
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uint8_t old, new;
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int error;
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error = as3722_read(sc, reg, &old, flags);
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if (error) {
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return error;
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}
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new = set | (old & ~clr);
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return as3722_write(sc, reg, new, flags);
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}
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static int
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as3722_wdt_setmode(struct sysmon_wdog *smw)
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{
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struct as3722_softc * const sc = smw->smw_cookie;
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int error;
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const int flags = (cold ? I2C_F_POLL : 0);
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if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
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iic_acquire_bus(sc->sc_i2c, flags);
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error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
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0, AS3722_WATCHDOG_CTRL_ON, flags);
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iic_release_bus(sc->sc_i2c, flags);
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return error;
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}
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if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
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smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
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}
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if (smw->smw_period < 1 || smw->smw_period > 128) {
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return EINVAL;
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}
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sc->sc_smw.smw_period = smw->smw_period;
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iic_acquire_bus(sc->sc_i2c, flags);
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error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG,
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__SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER),
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AS3722_WATCHDOG_TIMER_TIMER, flags);
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if (error == 0) {
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error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
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AS3722_WATCHDOG_CTRL_ON, 0, flags);
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}
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iic_release_bus(sc->sc_i2c, flags);
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return error;
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}
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static int
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as3722_wdt_tickle(struct sysmon_wdog *smw)
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{
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struct as3722_softc * const sc = smw->smw_cookie;
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int error;
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const int flags = (cold ? I2C_F_POLL : 0);
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iic_acquire_bus(sc->sc_i2c, flags);
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error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG,
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AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags);
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iic_release_bus(sc->sc_i2c, flags);
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return error;
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}
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int
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as3722_poweroff(device_t dev)
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{
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struct as3722_softc * const sc = device_private(dev);
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int error;
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const int flags = I2C_F_POLL;
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iic_acquire_bus(sc->sc_i2c, flags);
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error = as3722_write(sc, AS3722_RESET_CTRL_REG,
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AS3722_RESET_CTRL_POWER_OFF, flags);
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iic_release_bus(sc->sc_i2c, flags);
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return error;
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}
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int
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as3722_reboot(device_t dev)
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{
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struct as3722_softc * const sc = device_private(dev);
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int error;
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const int flags = I2C_F_POLL;
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iic_acquire_bus(sc->sc_i2c, flags);
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error = as3722_write(sc, AS3722_RESET_CTRL_REG,
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AS3722_RESET_CTRL_FORCE_RESET, flags);
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iic_release_bus(sc->sc_i2c, flags);
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return error;
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}
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