398 lines
13 KiB
C
398 lines
13 KiB
C
/* $NetBSD: scsi_disk.h,v 1.35 2023/12/07 07:04:13 andvar Exp $ */
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/*
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* SCSI-specific interface description
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*/
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/*
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* Some lines of this file come from a file of the name "scsi.h"
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* distributed by OSF as part of mach2.5,
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* so the following disclaimer has been kept.
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*
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* Copyright 1990 by Open Software Foundation,
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* Grenoble, FRANCE
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*
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation, and that the name of OSF or Open Software
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* Foundation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission.
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*
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* OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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* IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Largely written by Julian Elischer (julian@tfs.com)
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* for TRW Financial Systems.
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*
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* TRW Financial Systems, in accordance with their agreement with Carnegie
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* Mellon University, makes this software available to CMU to distribute
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* or use in any manner that they see fit as long as this message is kept with
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* the software. For this reason TFS also grants any other persons or
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* organisations permission to use or modify this software.
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*
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* TFS supplies this software to be publicly redistributed
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* on the understanding that TFS is not responsible for the correct
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* functioning of this software in any circumstances.
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*
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* Ported to run under 386BSD by Julian Elischer (julian@tfs.com) Sept 1992
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*/
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/*
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* SCSI command format
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*/
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#ifndef _DEV_SCSIPI_SCSI_DISK_H_
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#define _DEV_SCSIPI_SCSI_DISK_H_
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/*
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* XXX Is this also used by ATAPI?
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*/
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#define SCSI_FORMAT_UNIT 0x04
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struct scsi_format_unit {
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u_int8_t opcode;
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u_int8_t flags;
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#define SFU_DLF_MASK 0x07
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#define SFU_CMPLST 0x08
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#define SFU_FMTDATA 0x10
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u_int8_t vendor_specific;
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u_int8_t interleave[2];
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u_int8_t control;
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};
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/*
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* If the FmtData bit is set, a FORMAT UNIT parameter list is transferred
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* to the target during the DATA OUT phase. The parameter list includes
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*
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* Defect list header
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* Initialization pattern descriptor (if any)
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* Defect descriptor(s) (if any)
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*/
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struct scsi_format_unit_defect_list_header {
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u_int8_t reserved;
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u_int8_t flags;
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#define DLH_VS 0x01 /* vendor specific */
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#define DLH_IMMED 0x02 /* immediate return */
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#define DLH_DSP 0x04 /* disable saving parameters */
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#define DLH_IP 0x08 /* initialization pattern */
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#define DLH_STPF 0x10 /* stop format */
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#define DLH_DCRT 0x20 /* disable certification */
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#define DLH_DPRY 0x40 /* disable primary */
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#define DLH_FOV 0x80 /* format options valid */
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u_int8_t defect_lst_len[2];
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};
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/*
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* See Table 117 of the SCSI-2 specification for a description of
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* the IP modifier.
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*/
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struct scsi_initialization_pattern_descriptor {
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u_int8_t ip_modifier;
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u_int8_t pattern_type;
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#define IP_TYPE_DEFAULT 0x01
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#define IP_TYPE_REPEAT 0x01
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/* 0x02 -> 0x7f: reserved */
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/* 0x80 -> 0xff: vendor-specific */
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u_int8_t pattern_length[2];
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#if 0
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u_int8_t pattern[...];
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#endif
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};
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/*
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* Defect descriptors. These are used as the defect lists in the FORMAT UNIT
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* and READ DEFECT DATA commands, and as the translate page of the
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* SEND DIAGNOSTIC and RECEIVE DIAGNOSTIC RESULTS commands.
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*/
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/* Block format */
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struct scsi_defect_descriptor_bf {
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u_int8_t block_address[4];
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};
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/* Bytes from index format */
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struct scsi_defect_descriptor_bfif {
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u_int8_t cylinder[3];
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u_int8_t head;
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u_int8_t bytes_from_index[4];
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};
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/* Physical sector format */
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struct scsi_defect_descriptor_psf {
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u_int8_t cylinder[3];
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u_int8_t head;
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u_int8_t sector[4];
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};
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/*
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* XXX for now this isn't in the ATAPI specs, but if there are on day
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* ATAPI hard disks, it is likely that they implement this command (or a
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* command like this ?
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*/
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#define SCSI_REASSIGN_BLOCKS 0x07
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struct scsi_reassign_blocks {
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u_int8_t opcode;
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u_int8_t byte2;
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u_int8_t unused[3];
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u_int8_t control;
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};
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/*
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* XXX Is this also used by ATAPI?
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*/
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#define SCSI_REZERO_UNIT 0x01
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struct scsi_rezero_unit {
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u_int8_t opcode;
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u_int8_t byte2;
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u_int8_t reserved[3];
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u_int8_t control;
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};
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#define SCSI_READ_6_COMMAND 0x08
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#define SCSI_WRITE_6_COMMAND 0x0a
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struct scsi_rw_6 {
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u_int8_t opcode;
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u_int8_t addr[3];
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#define SRW_TOPADDR 0x1F /* only 5 bits here */
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u_int8_t length;
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u_int8_t control;
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};
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/*
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* XXX Does ATAPI have an equivalent?
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*/
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#define SCSI_SYNCHRONIZE_CACHE_10 0x35
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struct scsi_synchronize_cache_10 {
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u_int8_t opcode;
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u_int8_t flags;
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#define SSC_RELADR 0x01 /* obsolete */
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#define SSC_IMMED 0x02
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#define SSC_SYNC_NV 0x04
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u_int8_t addr[4];
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u_int8_t byte7;
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u_int8_t length[2];
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u_int8_t control;
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};
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/*
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* XXX Does ATAPI have an equivalent?
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*/
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#define SCSI_READ_DEFECT_DATA 0x37
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struct scsi_read_defect_data {
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u_int8_t opcode;
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u_int8_t byte2;
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#define RDD_PRIMARY 0x10
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#define RDD_GROWN 0x08
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#define RDD_BF 0x00
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#define RDD_BFIF 0x04
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#define RDD_PSF 0x05
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u_int8_t flags;
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u_int8_t reserved[4];
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u_int8_t length[2];
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u_int8_t control;
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};
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#define SCSI_SYNCHRONIZE_CACHE_16 0x91
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struct scsi_synchronize_cache_16 {
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u_int8_t opcode;
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u_int8_t flags; /* see SYNCHRONIZE CACHE (10) */
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u_int8_t addr[8];
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u_int8_t length[4];
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u_int8_t byte15;
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u_int8_t control;
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};
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/* DATAs definitions for the above commands */
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struct scsi_reassign_blocks_data {
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u_int8_t reserved[2];
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u_int8_t length[2];
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struct {
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u_int8_t dlbaddr[4];
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} defect_descriptor[1];
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};
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struct scsi_read_defect_data_data {
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u_int8_t reserved;
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u_int8_t flags;
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u_int8_t length[2];
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union scsi_defect_descriptor {
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struct scsi_defect_descriptor_bf bf;
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struct scsi_defect_descriptor_bfif bfif;
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struct scsi_defect_descriptor_psf psf;
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} defect_descriptor[1];
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};
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union scsi_disk_pages {
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#define DISK_PGCODE 0x3F /* only 6 bits valid */
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struct page_err_recov {
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u_int8_t pg_code; /* page code (should be 1) */
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u_int8_t pg_length; /* page length (should be 0x0a) */
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u_int8_t flags; /* error recovery flags */
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#define ERR_RECOV_DCR 0x01 /* disable correction */
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#define ERR_RECOV_DTE 0x02 /* disable transfer on error */
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#define ERR_RECOV_PER 0x04 /* post error */
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#define ERR_RECOV_EER 0x08 /* enable early recovery */
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#define ERR_RECOV_RC 0x10 /* read continuous */
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#define ERR_RECOV_TB 0x20 /* transfer block */
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#define ERR_RECOV_ARRE 0x40 /* autom. read reallocation enable */
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#define ERR_RECOV_AWRE 0x80 /* autom. write reallocation enable */
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u_int8_t rd_retry_ct; /* read retry count */
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u_int8_t corr_span; /* correction span */
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u_int8_t hd_off_ct; /* head offset count */
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u_int8_t dat_strb_off_ct; /* data strobe offset count */
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u_int8_t reserved1;
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u_int8_t wr_retry_ct; /* write retry count */
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u_int8_t reserved2;
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u_int8_t recov_tm_lim[2]; /* recovery time limit */
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} err_recov_params;
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struct page_disk_format {
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u_int8_t pg_code; /* page code (should be 3) */
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u_int8_t pg_length; /* page length (should be 0x16) */
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u_int8_t trk_z[2]; /* tracks per zone */
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u_int8_t alt_sec[2]; /* alternate sectors per zone */
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u_int8_t alt_trk_z[2]; /* alternate tracks per zone */
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u_int8_t alt_trk_v[2]; /* alternate tracks per volume */
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u_int8_t ph_sec_t[2]; /* physical sectors per track */
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u_int8_t bytes_s[2]; /* bytes per sector */
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u_int8_t interleave[2]; /* interleave */
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u_int8_t trk_skew[2]; /* track skew factor */
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u_int8_t cyl_skew[2]; /* cylinder skew */
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u_int8_t flags; /* various */
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#define DISK_FMT_SURF 0x10
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#define DISK_FMT_RMB 0x20
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#define DISK_FMT_HSEC 0x40
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#define DISK_FMT_SSEC 0x80
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u_int8_t reserved1;
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u_int8_t reserved2;
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u_int8_t reserved3;
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} disk_format;
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struct page_rigid_geometry {
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u_int8_t pg_code; /* page code (should be 4) */
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u_int8_t pg_length; /* page length (should be 0x16) */
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u_int8_t ncyl[3]; /* number of cylinders */
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u_int8_t nheads; /* number of heads */
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u_int8_t st_cyl_wp[3]; /* starting cyl., write precomp */
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u_int8_t st_cyl_rwc[3]; /* starting cyl., red. write cur */
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u_int8_t driv_step[2]; /* drive step rate */
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u_int8_t land_zone[3]; /* landing zone cylinder */
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u_int8_t sp_sync_ctl; /* spindle synch control */
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#define SPINDLE_SYNCH_MASK 0x03 /* mask of valid bits */
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#define SPINDLE_SYNCH_NONE 0x00 /* synch disabled or not supported */
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#define SPINDLE_SYNCH_SLAVE 0x01 /* disk is a slave */
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#define SPINDLE_SYNCH_MASTER 0x02 /* disk is a master */
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#define SPINDLE_SYNCH_MCONTROL 0x03 /* disk is a master control */
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u_int8_t rot_offset; /* rotational offset (for spindle synch) */
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u_int8_t reserved1;
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u_int8_t rpm[2]; /* media rotation speed */
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u_int8_t reserved2;
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u_int8_t reserved3;
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} rigid_geometry;
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struct page_flex_geometry {
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u_int8_t pg_code; /* page code (should be 5) */
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u_int8_t pg_length; /* page length (should be 0x1e) */
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u_int8_t xfr_rate[2];
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u_int8_t nheads; /* number of heads */
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u_int8_t ph_sec_tr; /* physical sectors per track */
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u_int8_t bytes_s[2]; /* bytes per sector */
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u_int8_t ncyl[2]; /* number of cylinders */
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u_int8_t st_cyl_wp[2]; /* start cyl., write precomp */
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u_int8_t st_cyl_rwc[2]; /* start cyl., red. write cur */
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u_int8_t driv_step[2]; /* drive step rate */
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u_int8_t driv_step_w; /* drive step pulse width */
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u_int8_t head_settle[2];/* head settle delay */
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u_int8_t motor_on; /* motor on delay */
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u_int8_t motor_off; /* motor off delay */
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u_int8_t flags; /* various flags */
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#define MOTOR_ON 0x20 /* motor on (pin 16)? */
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#define START_AT_SECTOR_1 0x40 /* start at sector 1 */
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#define READY_VALID 0x20 /* RDY (pin 34) valid */
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u_int8_t step_p_cyl; /* step pulses per cylinder */
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u_int8_t write_pre; /* write precompensation */
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u_int8_t head_load; /* head load delay */
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u_int8_t head_unload; /* head unload delay */
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u_int8_t pin_34_2; /* pin 34 (6) pin 2 (7/11) definition */
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u_int8_t pin_4_1; /* pin 4 (8/9) pin 1 (13) definition */
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u_int8_t rpm[2]; /* rotational rate */
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u_int8_t reserved1;
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u_int8_t reserved2;
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} flex_geometry;
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struct page_caching {
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u_int8_t pg_code; /* page code (should be 8) */
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u_int8_t pg_length; /* page length (should be 0x0a) */
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u_int8_t flags; /* cache parameter flags */
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#define CACHING_RCD 0x01 /* read cache disable */
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#define CACHING_MF 0x02 /* multiplication factor */
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#define CACHING_WCE 0x04 /* write cache enable (write-back) */
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#define CACHING_SIZE 0x08 /* use CACHE SEGMENT SIZE */
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#define CACHING_DISC 0x10 /* pftch across time discontinuities */
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#define CACHING_CAP 0x20 /* caching analysis permitted */
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#define CACHING_ABPF 0x40 /* abort prefetch */
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#define CACHING_IC 0x80 /* initiator control */
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u_int8_t ret_prio; /* retention priority */
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#define READ_RET_PRIO_SHIFT 4
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#define RET_PRIO_DONT_DISTINGUISH 0x0
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#define RET_PRIO_REPLACE_READ_WRITE 0x1
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#define RET_PRIO_REPLACE_PREFETCH 0xf
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u_int8_t dis_prefetch_xfer_len[2];
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u_int8_t min_prefetch[2];
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u_int8_t max_prefetch[2];
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u_int8_t max_prefetch_ceiling[2];
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u_int8_t flags2; /* additional cache param flags */
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#define CACHING2_VS0 0x08 /* vendor specific bit */
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#define CACHING2_VS1 0x10 /* vendor specific bit */
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#define CACHING2_DRA 0x20 /* disable read ahead */
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#define CACHING2_LBCSS 0x40 /* CACHE SEGMENT SIZE is blocks */
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#define CACHING2_FSW 0x80 /* force sequential write */
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u_int8_t num_cache_segments;
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u_int8_t cache_segment_size[2];
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u_int8_t reserved1;
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u_int8_t non_cache_segment_size[2];
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} caching_params;
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struct page_control {
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u_int8_t pg_code; /* page code (should be 0x0a) */
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u_int8_t pg_length; /* page length (should be 0x0a) */
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u_int8_t ctl_flags1; /* First set of flags */
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#define CTL1_TST_PER_INTR 0x40 /* Task set per initiator */
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#define CTL1_TST_FIELD 0xe0 /* Full field */
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#define CTL1_D_SENSE 0x04 /* Descriptor-format sense return */
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#define CTL1_GLTSD 0x02 /* Glob. Log Targ. Save Disable */
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#define CTL1_RLEC 0x01 /* Rpt Logging Exception Condition */
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u_int8_t ctl_flags2; /* Second set of flags */
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#define CTL2_QAM_UNRESTRICT 0x10 /* Unrestricted reordering allowed */
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#define CTL2_QAM_FIELD 0xf0 /* Full Queue alogo. modifier field */
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#define CTL2_QERR_ABRT 0x02 /* Queue error - abort all */
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#define CTL2_QERR_ABRT_SELF 0x06 /* Queue error - abort intr's */
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#define CTL2_QERR_FIELD 0x06 /* Full field */
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#define CTL2_DQUE 0x01 /* Disable queuing */
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u_int8_t ctl_flags3; /* Third set of flags */
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#define CTL3_TAS 0x80 /* other-intr aborts generate status */
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#define CTL3_RAC 0x40 /* Report A Check */
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#define CTL3_UAIC_RET 0x10 /* retain UA, see SPC-3 */
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#define CTL3_UAIC_RET_EST 0x30 /* retain UA and establish UA */
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#define CTL3_UA_INTRLOCKS 0x30 /* UA Interlock control field */
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#define CTL3_SWP 0x08 /* Software write protect */
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#define CTL3_RAERP 0x04 /* (unit) Ready AER Permission */
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#define CTL3_UAAERP 0x02 /* Unit Attention AER Permission */
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#define CTL3_EAERP 0x01 /* Error AER Permission */
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u_int8_t ctl_autoload; /* autoload mode control */
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#define CTL_AUTOLOAD_FIELD 0x07 /* autoload field */
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u_int8_t ctl_r_hld[2]; /* RAERP holdoff period */
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u_int8_t ctl_busy[2]; /* busy timeout period */
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u_int8_t ctl_selt[2]; /* extended self-test completion time */
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} control_params;
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};
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#endif /* _DEV_SCSIPI_SCSI_DISK_H_ */
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