140 lines
4.8 KiB
C
140 lines
4.8 KiB
C
/* $NetBSD: mvxpbmvar.h,v 1.4 2022/03/13 17:50:55 andvar Exp $ */
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/*
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* Copyright (c) 2015 Internet Initiative Japan Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MVXPBMVAR_H_
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#define _MVXPBMVAR_H_
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#include <dev/marvell/marvellvar.h>
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/*
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* Max number of unit.
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*/
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#define MVXPBM_UNIT_MAX 1
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/*
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* Buffer alignment
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*/
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#define MVXPBM_NUM_SLOTS 2048 /* minimum number of slots */
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#define MVXPBM_PACKET_SIZE 2000 /* minimum packet size */
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#define MVXPBM_BUF_ALIGN 65536 /* Mbus window size granularity */
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#define MVXPBM_BUF_MASK (MVXPBM_BUF_ALIGN - 1)
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#define MVXPBM_CHUNK_ALIGN 32 /* Cache line size */
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#define MVXPBM_CHUNK_MASK (MVXPBM_CHUNK_ALIGN - 1)
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#define MVXPBM_DATA_ALIGN 32 /* Cache line size */
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#define MVXPBM_DATA_MASK (MVXPBM_DATA_ALIGN - 1)
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#define MVXPBM_DATA_UNIT 8
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/*
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* Packet Buffer Header
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*
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* this chunks may be managed by H/W Buffer Manger(BM) device,
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* but there is no device driver yet.
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*
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* +----------------+ bm_buf
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* |chunk header | |
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* +----------------+ | | |chunk->buf_off
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* |mbuf (M_EXT set)|<--------|struct mbuf *m | V
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* +----------------+ +----------------+ chunk->buf_va/buf_pa
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* | m_ext.ext_buf|-------->|packet buffer | |
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* +----------------+ | | |chunk->buf_size
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* | | V
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* +----------------+
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* |chunk header |
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* |.... |
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*/
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struct mvxpbm_chunk {
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struct mbuf *m; /* back pointer to mbuf header */
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void *sc; /* back pointer to softc */
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off_t off; /* offset of chunk */
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paddr_t pa; /* physical address of chunk */
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off_t buf_off; /* offset of packet from sc_bm_buf */
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paddr_t buf_pa; /* physical address of packet */
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vaddr_t buf_va; /* virtual address of packet */
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size_t buf_size; /* size of buffer (exclude hdr) */
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LIST_ENTRY(mvxpbm_chunk) link;
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/* followed by packet buffer */
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};
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struct mvxpbm_softc {
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device_t sc_dev;
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bus_dma_tag_t sc_dmat;
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bus_space_tag_t sc_iot;
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kmutex_t sc_mtx;
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/* software emulated */
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int sc_emul;
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/* DMA MAP for entire buffer */
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bus_dmamap_t sc_buf_map;
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char *sc_buf;
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paddr_t sc_buf_pa;
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size_t sc_buf_size;
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/* memory chunk properties */
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size_t sc_slotsize; /* size of bm_slots include header */
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uint32_t sc_chunk_count; /* number of chunks */
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size_t sc_chunk_size; /* size of packet buffer */
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size_t sc_chunk_header_size; /* size of header + padding */
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off_t sc_chunk_packet_offset; /* allocate m_leading_space */
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/* for software based management */
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LIST_HEAD(__mvxpbm_freehead, mvxpbm_chunk) sc_free;
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LIST_HEAD(__mvxpbm_inusehead, mvxpbm_chunk) sc_inuse;
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};
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#define BM_SYNC_ALL 0
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/* get mvxpbm device context */
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struct mvxpbm_softc *mvxpbm_device(struct marvell_attach_args *);
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/* allocate new memory chunk */
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struct mvxpbm_chunk *mvxpbm_alloc(struct mvxpbm_softc *);
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/* free memory chunk */
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void mvxpbm_free_chunk(struct mvxpbm_chunk *);
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/* prepare mbuf header after Rx */
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int mvxpbm_init_mbuf_hdr(struct mvxpbm_chunk *);
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/* sync DMA seguments */
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void mvxpbm_dmamap_sync(struct mvxpbm_chunk *, size_t, int);
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/* lock */
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void mvxpbm_lock(struct mvxpbm_softc *);
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void mvxpbm_unlock(struct mvxpbm_softc *);
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/* get params */
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const char *mvxpbm_xname(struct mvxpbm_softc *);
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size_t mvxpbm_chunk_size(struct mvxpbm_softc *);
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uint32_t mvxpbm_chunk_count(struct mvxpbm_softc *);
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off_t mvxpbm_packet_offset(struct mvxpbm_softc *);
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paddr_t mvxpbm_buf_pbase(struct mvxpbm_softc *);
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size_t mvxpbm_buf_size(struct mvxpbm_softc *);
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#endif /* _MVXPBMVAR_H_ */
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