146 lines
4.8 KiB
C
146 lines
4.8 KiB
C
/* $NetBSD: tsl256xreg.h,v 1.2 2021/01/04 21:59:48 thorpej Exp $ */
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/*-
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* Copyright (c) 2018 Jason R. Thorpe
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef tsl256xreg_h_included
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#define tsl256xreg_h_included
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/*
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* Hardware definitions for the TAOS TSL2560 (SMBus) and TSL2561 (I2C).
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*
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* These devices combine a broadband photodiode (visible light + infrared)
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* and an additional ifrared phtodiode onto a single CMOS integrated circuit.
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* The devices include programmable thresholds that can trigger SMB-Alert
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* type interrupts (TSL2560) or a traditional level-triggered interrupt
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* (TSL2561) that remains asserted until cleared.
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*/
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/*
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* Valid I2C addresses for the TSL2561. The address is selected based
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* on how the ADDR_SEL pin is connected.
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*/
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#define TSL256x_SLAVEADDR_GND 0x29 /* ADDR SEL tied to ground */
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#define TSL256x_SLAVEADDR_FLOAT 0x39 /* ADDR SEL left floating */
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#define TSL256x_SLAVEADDR_VDD 0x49 /* ADDR SEL tied to Vdd */
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#define TSL256x_SMB_ALERT_ADDR 0x0c /* SMB Alert address (all configs) */
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/*
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* TSL256x register definitions.
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*/
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/* COMMAND - Specifies register address and other parameters */
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#define COMMAND6x_REGMASK 0x0f /* register address mask */
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#define COMMAND6x_BLOCK 0x10 /* transaction uses block read/write */
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#define COMMAND6x_WORD 0x20 /* transaction uses word read/write */
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#define COMMAND6x_CLEAR 0x40 /* clear pending interrupt */
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#define COMMAND6x_CMD 0x80 /* Select command register; MBO */
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/* CONTROL - Control of basic functions */
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#define TSL256x_REG_CONTROL 0x0
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#define CONTROL6x_POWER_OFF 0x00
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#define CONTROL6x_POWER_ON 0x03
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/* TIMING - Integration time / gain control */
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#define TSL256x_REG_TIMING 0x1
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#define TIMING6x_INTEG_13_7ms 0x00 /* 13.7ms integration time */
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#define TIMING6x_INTEG_101ms 0x01 /* 101ms integration time */
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#define TIMING6x_INTEG_402ms 0x02 /* 402ms integration time */
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#define TIMING6x_INTEG_MANUAL 0x03 /* use manual timing */
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#define TIMING6x_MANUAL 0x08 /* manual timing; 1 starts, 0 stops */
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#define TIMING6x_GAIN_1X 0x00
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#define TIMING6x_GAIN_16X 0x10
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/* THRESHLOWLOW - Low byte of low interrupt threshold */
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#define TSL256x_REG_LOWLOW 0x2
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/* THRESHLOWHIGH - High byte of low interrupt threshold */
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#define TSL256x_REG_LOWHIGH 0x3
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/* THRESHHIGHLOW - Low byte of high interrupt threshold */
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#define TSL256x_REG_HIGHLOW 0x4
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/* THRESHHIGHHIGH - High byte of high interrupt threshold */
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#define TSL256x_REG_HIGHHIGH 0x5
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/* INTERRUPT - Interrupt control */
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#define TSL256x_REG_INTERRUPT 0x6
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#define INTERRUPT6x_LEVEL 0x01 /* Level-triggered interrupt */
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#define INTERRUPT6x_SMB_ALERT 0x02 /* SMB Alert compliant interrupt */
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#define INTERRUPT6x_TEST 0x03 /* interrupt test */
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#define INTERRUPT6x_PERSIST(x) ((x) << 4)
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/*
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* Interrupt persist settings:
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* 0 - Every ADC cycle generates an interrupt
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* 1..15 - # integration periods outside threshold range
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*/
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/* 0x7 - Reserved */
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/* CRC - Factory test -- not a user register */
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#define TSL256x_REG_CRC 0x8
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/* 0x9 - Reserved */
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/* ID - Part number / Rev ID */
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#define TSL256x_REG_ID 0xa
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#define ID6x_GET_PARTNO(x) (((x) & 0xf0) >> 4)
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#define ID6x_PARTNO_TSL2560 0x0
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#define ID6x_PARTNO_TSL2561 0x1
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#define ID6x_GET_REVNO(x) ((x) & 0x0f)
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/* 0xb - Reserved */
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/* DATA0LOW - Low byte of ADC channel 0 */
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#define TSL256x_REG_DATA0LOW 0xc
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/* DATA0HIGH - High byte of ADC channel 0 */
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#define TSL256x_REG_DATA0HIGH 0xd
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/* DATA1LOW - Low byte of ADC channel 1 */
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#define TSL256x_REG_DATA1LOW 0xe
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/* DATA1HIGH - High byte of ADC channel 1 */
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#define TSL256x_REG_DATA1HIGH 0xf
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#endif /* tsl256xreg_h_included */
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